Granted Patent
Utility
US 6,643,713 · App. 10/028,425
Apparatus has a microprocessor including DSP and a CPU integrated with each other as a single bus master
Inventors:
Tetsuya Nakagawa, Yuji Hatano, Yasuhiro Sagesaka, Toru Baji, Koki Noguchi
Patented Case
View Patent ↗
Granted: Nov 4, 2003
Filed: Dec 28, 2001
Inventors
Tetsuya Nakagawa
Yuji Hatano
Yasuhiro Sagesaka
Toru Baji
Koki Noguchi
Assignee (at issue)
HITACHI, LTD.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.