Granted Patent
Utility
US 6,646,933 · App. 10/210,525
Method and apparatus to reduce the amount of redundant memory column and fuses associated with a memory device
Inventors:
Alexander Shubat, Niranjan Behera, Izak Kense
Patented Case
View Patent ↗
Granted: Nov 11, 2003
Filed: Jul 31, 2002
Inventors
Alexander Shubat
Niranjan Behera
Izak Kense
Assignee (at issue)
Virage Logic Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.