IP Library Granted Patent US 6,653,966
Granted Patent Utility
US 6,653,966 · App. 10/359,201

Subranging analog to digital converter with multi-phase clock timing

Inventors: Franciscus Maria Leonardus van der Goes, Jan Mulder, Christopher M. Ward, Jan Roelof Westra, Rudy J. van de Plassche, Marcel Lugthart
Patented Case View Patent ↗
Granted: Nov 25, 2003 Filed: Feb 6, 2003
Inventors
Franciscus Maria Leonardus van der Goes
Jan Mulder
Christopher M. Ward
Jan Roelof Westra
Rudy J. van de Plassche
Marcel Lugthart
Assignee (at issue)
Broadcom Corporation

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Quick Facts
Patent No.
US 6,653,966
App. No.
10/359,201
Filed
2003-02-06
Granted
2003-11-25
Kind
B1