IP Library Granted Patent US 6,667,552
Granted Patent Utility
US 6,667,552 · App. 09/252,186

Low dielectric metal silicide lined interconnection system

Inventor: Matthew S. Buynoski
Patented Case View Patent ↗
Granted: Dec 23, 2003 Filed: Feb 18, 1999
Inventor
Matthew S. Buynoski
Assignee (at issue)
Advanced Micro Devices, Inc.

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Quick Facts
Patent No.
US 6,667,552
App. No.
09/252,186
Filed
1999-02-18
Granted
2003-12-23
Kind
B1