IP Library Granted Patent US 6,691,221
Granted Patent Utility
US 6,691,221 · App. 09/863,898

Loading previously dispatched slots in multiple instruction dispatch buffer before dispatching remaining slots for parallel execution

Inventors: Chandra Joshi, Paul Rodman, Peter Hsu, Monica R. Nofal
Patented Case View Patent ↗
Granted: Feb 10, 2004 Filed: May 24, 2001
Inventors
Chandra Joshi
Paul Rodman
Peter Hsu
Monica R. Nofal
Assignees (at issue)
MIPS Technologies, Inc.
Kabushiki Kaisha Toshiba

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Quick Facts
Patent No.
US 6,691,221
App. No.
09/863,898
Filed
2001-05-24
Granted
2004-02-10
Kind
B2