IP Library › Granted Patent US 6,697,929
Granted Patent Utility
US 6,697,929 · App. 09/504,004

Scannable zero-catcher and one-catcher circuits for reduced clock loading and power dissipation

Inventors: Brian S. Cherkauer, Samuel D. Naffziger
Patented Case View Patent ↗
Granted: Feb 24, 2004 Filed: Feb 14, 2000
Inventors
Brian S. Cherkauer
Samuel D. Naffziger
Assignee (at issue)
Intel Corporation

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Quick Facts
Patent No.
US 6,697,929
App. No.
09/504,004
Filed
2000-02-14
Granted
2004-02-24
Kind
B1