IP Library › Granted Patent US 6,700,814
Granted Patent Utility
US 6,700,814 · App. 10/283,622

Sense amplifier bias circuit for a memory having at least two distinct resistance states

Inventors: Joseph J. Nahas, Thomas Andre, Bradley J. Garni
Patented Case View Patent ↗
Granted: Mar 2, 2004 Filed: Oct 30, 2002
Inventors
Joseph J. Nahas
Thomas Andre
Bradley J. Garni
Assignee (at issue)
Motorola, Inc.

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Quick Facts
Patent No.
US 6,700,814
App. No.
10/283,622
Filed
2002-10-30
Granted
2004-03-02
Kind
B1