Granted Patent
Utility
US 6,711,042 · App. 10/096,937
Semiconductor device whereon memory chip and logic chip are mounted, making testing of memory chip possible
Inventor:
Katsuya Ishikawa
Patented Case
View Patent ↗
Granted: Mar 23, 2004
Filed: Mar 14, 2002
Inventor
Katsuya Ishikawa
Assignee (at issue)
Fujitsu Limited
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.