Granted Patent
Utility
US 6,725,437 · App. 10/321,141
Performance groups-based fast simulated annealing for improving speed and quality of VLSI circuit placement
Inventors:
Prahlada B Rao, Srinivasa R Patil
Patented Case
View Patent ↗
Granted: Apr 20, 2004
Filed: Dec 17, 2002
Inventors
Prahlada B Rao
Srinivasa R Patil
Assignee (at issue)
International Business Machines Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.