IP Library Granted Patent US 6,737,897
Granted Patent Utility
US 6,737,897 · App. 10/231,509

Power reduction for delay locked loop circuits

Inventors: Tyler Gomm, Travis E. Dirkes, Ross Dermott, Daniel R. Loughmiller, Scott E. Smith
Patented Case View Patent ↗
Granted: May 18, 2004 Filed: Aug 29, 2002
Inventors
Tyler Gomm
Travis E. Dirkes
Ross Dermott
Daniel R. Loughmiller
Scott E. Smith
Assignee (at issue)
Micron Technology, Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,737,897
App. No.
10/231,509
Filed
2002-08-29
Granted
2004-05-18
Kind
B2