IP Library › Granted Patent US 6,738,949
Granted Patent Utility
US 6,738,949 · App. 09/311,394

Error correction circuit and error correction method

Inventors: Hiroyuki Senda, Akira Kisoda, Takehiro Kamada
Patented Case View Patent ↗
Granted: May 18, 2004 Filed: May 13, 1999
Inventors
Hiroyuki Senda
Akira Kisoda
Takehiro Kamada
Assignee (at issue)
SUMITOMO ELECTRIC INDUSTRIES, LTD.

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Quick Facts
Patent No.
US 6,738,949
App. No.
09/311,394
Filed
1999-05-13
Granted
2004-05-18
Kind
B2