Granted Patent
Utility
US 6,741,193 · App. 10/010,073
Parallel in serial out circuit having flip-flop latching at multiple clock rates
Inventor:
Yoshihito Nagata
Patented Case
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Granted: May 25, 2004
Filed: Nov 8, 2001
Inventor
Yoshihito Nagata
Assignee (at issue)
NEC Electronics Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.