Granted Patent
Utility
US 6,751,113 · App. 10/094,512
Arrangement of integrated circuits in a memory module
Inventors:
Jayesh R. Bhakta, Robert Pauley
Patented Case
View Patent ↗
Granted: Jun 15, 2004
Filed: Mar 7, 2002
Inventors
Jayesh R. Bhakta
Robert Pauley
Assignee (at issue)
Netlist, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.