Granted Patent
Utility
US 6,768,685 · App. 09/990,894
Integrated circuit memory array with fast test mode utilizing multiple word line selection and method therefor
Inventor:
Roy E. Scheuerlein
Patented Case
View Patent ↗
Granted: Jul 27, 2004
Filed: Nov 16, 2001
Inventor
Roy E. Scheuerlein
Assignee (at issue)
Mtrix Semiconductor, Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.