IP Library Granted Patent US 6,777,977
Granted Patent Utility
US 6,777,977 · App. 10/137,729

Three input field programmable gate array logic circuit configurable as a three input look up table, a D-latch or a D flip-flop

Inventors: Alan B. Reynolds, Andrew W. Reynolds, Volker Hecht
Patented Case View Patent ↗
Granted: Aug 17, 2004 Filed: May 1, 2002
Inventors
Alan B. Reynolds
Andrew W. Reynolds
Volker Hecht
Assignee (at issue)
Actel Corporation

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,777,977
App. No.
10/137,729
Filed
2002-05-01
Granted
2004-08-17
Kind
B1