IP Library Granted Patent US 6,780,751
Granted Patent Utility
US 6,780,751 · App. 10/267,453

Method for eliminating voiding in plated solder

Inventor: Owen R. Fay
Patented Case View Patent ↗
Granted: Aug 24, 2004 Filed: Oct 9, 2002
Inventor
Owen R. Fay
Assignee (at issue)
Freeescale Semiconductor, Inc.

This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.

Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,780,751
App. No.
10/267,453
Filed
2002-10-09
Granted
2004-08-24
Kind
B2