Granted Patent
Utility
US 6,795,953 · App. 10/167,039
Method for avoiding false failures attributable to dummy interconnects during defect analysis of an integrated circuit design
Inventors:
Sergei G. Bakarian, Julie Segal
Patented Case
View Patent ↗
Granted: Sep 21, 2004
Filed: Jun 11, 2002
Inventors
Sergei G. Bakarian
Julie Segal
Assignee (at issue)
HPL TECHNOLOGIES GMBH
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.