Granted Patent
Utility
US 6,799,308 · App. 10/325,806
Timing analysis of latch-controlled digital circuits with detailed clock skew analysis
Inventors:
Eileen H. You, Matthew Becker, Thomas Dillinger, Micah C. Knapp, Daniel J. Flees, Peter R. O'Brien, Chung Lau Chan
Patented Case
View Patent ↗
Granted: Sep 28, 2004
Filed: Dec 19, 2002
Inventors
Eileen H. You
Matthew Becker
Thomas Dillinger
Micah C. Knapp
Daniel J. Flees
Peter R. O'Brien
Chung Lau Chan
Assignee (at issue)
Sun Microsystems Inc.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.