IP Library Granted Patent US 6,800,898
Granted Patent Utility
US 6,800,898 · App. 09/951,239

Integrated circuit configuration and method of fabricating a dram structure with buried bit lines or trench capacitors

Inventors: Annalisa Cappelani, Bernhard Sell, Josef Willer
Patented Case View Patent ↗
Granted: Oct 5, 2004 Filed: Sep 12, 2001
Inventors
Annalisa Cappelani
Bernhard Sell
Josef Willer
Assignee (at issue)
Infineon Technologies AG

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Quick Facts
Patent No.
US 6,800,898
App. No.
09/951,239
Filed
2001-09-12
Granted
2004-10-05
Kind
B2