IP Library Granted Patent US 6,804,318
Granted Patent Utility
US 6,804,318 · App. 09/689,053

System and method for using a network timing reference circuit as a phase detector in a synchronization loop

Inventors: Laurent Francis Alloin, Daniel Amrany, Jean-Francois Lopez
Patented Case View Patent ↗
Granted: Oct 12, 2004 Filed: Oct 12, 2000
Inventors
Laurent Francis Alloin
Daniel Amrany
Jean-Francois Lopez
Assignee (at issue)
GlobespanVirata, Inc.

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Quick Facts
Patent No.
US 6,804,318
App. No.
09/689,053
Filed
2000-10-12
Granted
2004-10-12
Kind
B1