Granted Patent
Utility
US 6,807,115 · App. 10/360,867
Method of testing a semiconductor integrated device
Inventors:
Kazuo Kanetani, Hiroaki Nambu, Kaname Yamasaki, Fumihiko Arakawa, Takeshi Kusunoki, Keiichi Higeta
Patented Case
View Patent ↗
Granted: Oct 19, 2004
Filed: Feb 10, 2003
Inventors
Kazuo Kanetani
Hiroaki Nambu
Kaname Yamasaki
Fumihiko Arakawa
Takeshi Kusunoki
Keiichi Higeta
Assignees (at issue)
Renesas Technology Corporation
Hitachi Device Engineering Co., Ltd.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.