Granted Patent
Utility
US 6,814,296 · App. 10/135,308
Integrated circuit and associated design method with antenna error control using spare gates
Inventors:
Jay H. Angle, Christopher D. Gorsuch, Oscar G. Mercado, Anthony K. Myers, John Schadt, Brian W. Yeager
Patented Case
View Patent ↗
Granted: Nov 9, 2004
Filed: Apr 30, 2002
Inventors
Jay H. Angle
Christopher D. Gorsuch
Oscar G. Mercado
Anthony K. Myers
John Schadt
Brian W. Yeager
Assignee (at issue)
Lattice Semiconductor Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.