Granted Patent
Utility
US 6,828,644 · App. 10/393,389
Semiconductor device with reduced parasitic capacitance between impurity diffusion regions
Inventors:
Yuji Asano, Morio Katou, Takao Setoyama, Toshihiko Fukushima, Kazuhiro Natsuaki
Patented Case
View Patent ↗
Granted: Dec 7, 2004
Filed: Mar 21, 2003
Inventors
Yuji Asano
Morio Katou
Takao Setoyama
Toshihiko Fukushima
Kazuhiro Natsuaki
Assignees (at issue)
Fujitsu Limited
SHARP KABUSHIKI KAISHA
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.