Granted Patent
Utility
US 6,831,483 · App. 09/855,660
Semiconductor integrated circuit having high-speed and low-power logic gates with common transistor substrate potentials, and design data recording medium therefor
Inventors:
Yasuhisa Shimazaki, Motoi Ichihashi
Patented Case
View Patent ↗
Granted: Dec 14, 2004
Filed: May 16, 2001
Inventors
Yasuhisa Shimazaki
Motoi Ichihashi
Assignee (at issue)
Renesas Technology Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.