Granted Patent
Utility
US 6,833,765 · App. 10/351,266
Frequency locked loop with improved stability using binary rate multiplier circuits
Inventor:
Andrew Mallinson
Patented Case
View Patent ↗
Granted: Dec 21, 2004
Filed: Jan 23, 2003
Inventor
Andrew Mallinson
Assignee (at issue)
ESS TECH, INC.
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.