IP Library Granted Patent US 6,850,436
Granted Patent B2
US 6,850,436 · App. 10/611,856 · Granted Feb 1, 2005

Non-volatile semiconductor device having a means to relieve a deficient erasure address

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Quick Facts
Patent No.
US 6,850,436
App. No.
10/611,856
Granted
Feb 1, 2005
Kind
B2
Abstract

In a flash memory including memory blocks and a controller for performing erasure and the like with respect to the memory blocks, in the case where a deficient erasure status is output when a certain memory block receives an erasure command, a redundancy judging circuit stores an address at that time and an address inside of a redundant block as a redundant address with respect to the address at that time in a redundant address storage region. Thereafter, when the address is accessed, the address is replaced with the redundant address stored in the redundant address storage region, so that a deficient memory block can be replaced with a redundant block.

Claims (12)

1. A non-volatile semiconductor device including memory blocks and a controller for performing the control of operation of the memory blocks upon receipt of an address and a command, the non-volatile semiconductor storage device comprising:

a redundant memory block provided for redundancy in the case where deficient erasure occurs inside of the memory block;

a register for storing therein an input address;

a redundancy judging circuit for outputting an address stored in the register and an address stored inside of the redundant memory block as a redundant address with respect to the address stored in the register in the case where a deficient erasure status representing deficient erasure is output from the memory block when an erasure command is input into the memory block; and

redundant address storage means for storing therein the address and the redundant address;

wherein the address is replaced with the redundant address stored in the redundant address storage means when the address input into the controller is the address stored in the redundant address storage means, and memory operation is performed.

2. The non-volatile semiconductor device as claimed in claim 1 , wherein the redundant address storage means consists of the memory block.

3. The non-volatile semiconductor device as claimed in claim 1 , wherein the redundant address storage means consists of a fuse type memory.

4. The non-volatile semiconductor device as claimed in claim 1 , wherein output times of the deficient erasure status are counted, and then, the redundancy judging circuit outputs the address and the redundant address at the time when predetermined times are counted.

5. The non-volatile semiconductor device as claimed in claim 1 , wherein the address is replaced with the redundant address when a replacement command is received from the outside.

6. The non-volatile semiconductor device as claimed in claim 1 , wherein in the case where the redundant memory block is short of a storage area in a certain chip if said non-volatile semiconductor storage device is a multi-chip package, a redundant memory block in another chip is diverted.

7. The non-volatile semiconductor device as claimed in claim 1 , wherein in the case where the redundant memory block is short of a storage area in a normal chip if said non-volatile semiconductor storage device is a multi-chip package and a certain chip is unusable, a normal memory block inside of the unusable chip is diverted.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Sep 14, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024982/0558 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2003
From: OGAWA, TOMOYA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 014265/0879 →