IP Library Granted Patent US 6,940,134
Granted Patent B2
US 6,940,134 · App. 10/064,316 · Granted Sep 6, 2005

Semiconductor with contact contacting diffusion adjacent gate electrode

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Quick Facts
Patent No.
US 6,940,134
App. No.
10/064,316
Granted
Sep 6, 2005
Kind
B2
Abstract

Methods of forming a contact to a gate electrode or substrate despite misalignment of the contact opening due to lithographic techniques, and a semiconductor having such a contact. Silicide can be created on the gate and/or diffusion using the invention.

Claims (7)

1. A semiconductor comprising:

a contact having a portion that extends on two opposing vertical sides of a vertical structure adjacent a first gate electrode, and wherein the contact contacts a diffusion adjacent the first gate electrode and is insulated horizontally from an adjacent second gate electrode and a spacer adjacent the second gate electrode by an insulating layer; and

a masking layer for insulating the first gate electrode from the contact.

2. The semiconductor of claim 1 , wherein the contact includes an upper portion that is larger than a lower contact portion.

3. The semiconductor of claim 1 , wherein the vertical structure is a spacer.

4. The semiconductor of claim 3 , wherein the contact contacts a substrate adjacent the spacer.

5. The semiconductor of claim 1 , wherein the contact does not horizontally overlap the adjacent second gate electrode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2013
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: INTELLECTUAL DISCOVERY, INC.
Reel/Frame 030628/0554 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2002
From: FURUKAWA, TOSHIHARU; HAKEY, MARK C.; HOLMES, STEVEN J.; HORAK, DAVID V.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 012846/0215 →