IP Library Granted Patent US 7,028,243
Granted Patent B2
US 7,028,243 · App. 10/650,816 · Granted Apr 11, 2006

Method and device for error correction of data blocks

Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 7,028,243
App. No.
10/650,816
Granted
Apr 11, 2006
Kind
B2
Abstract

In a method for error correcting a data signal that is transmitted via a channel and contains data blocks with associated error checking information, the data signal is first equalized, with calculated soft-bit information. In a subsequent step, the error checking information is evaluated with respect to the data block. If the evaluation of the error checking information shows that a single bit error is present in one message bit, the single bit error is corrected only when a condition that is dependent on the soft-bit information is satisfied.

Claims (25)

1. A method for error correcting a data signal transmitted via a channel and containing data blocks with associated error checking information, which comprises the steps of:

deciding message bits in a transmitted data block resulting in decided message bits;

calculating soft-bit values relating to the decided message bits in the data block, the soft-bit values being representative of a level of reliability of a message bit decision;

evaluating the associated error checking information with respect to the data block to determine if a single bit error exists and, if the single bit error exists, determining a location of the single bit error resulting in a located single error bit; and

correcting the located single bit error, if:

a first variable, determined on a basis of the soft-bit values and allows an assessment as to whether more than one decided message bit in the data block is incorrect, satisfies a first threshold value condition; and

a second variable, determined on a basis of the soft-bit values and allows an assessment as to whether the decided message bit to be corrected is incorrect, satisfies a second threshold value condition.

2. The method according to claim 1 , which further comprises performing the method for error correcting the data blocks in general packet radio service mobile radio systems.

3. The method according to claim 1 , which further comprises performing the method for error correcting on data blocks which have been error-protection-coded in accordance with coding scheme CS-4.

4. The method according to claim 1 , which further comprises performing the calculating and deciding steps with an equalizer.

5. A device for error correcting a data signal transmitted via a channel and containing data blocks with associated error checking information, the device comprising:

bit decision means for deciding message bits in a transmitted data block resulting in decided message bits;

means for calculating soft-bit values relating to the decided message bits in the data block, the soft-bit values being representative of a level of reliability of a message bit decision;

means for evaluating the associated error checking information with respect to the data block to determine whether a single bit error exits and, if the single bit error exists, determining a location of the single bit error resulting in a located single bit error; and means for error correcting the located single bit error if:

a first variable, determined on a basis of the soft-bit values and allows an assessment as to whether more than one decided message bit in the data block is incorrect, satisfies a first threshold value condition; and

a second variable, determined on a basis of the soft-bit values and allows an assessment as to whether the decided message bit to be corrected is incorrect, satisfies a second threshold value condition.

6. The device according to claim 5 , wherein the device is configured for error correcting data blocks in general packet radio service mobile radio systems.

7. The device according to claim 5 , wherein the device is configured for error correcting the data blocks which have been error-protection-coded in accordance with coding scheme CS-4.

8. The device according to claim 5 , wherein said bit decision means and said means for calculating soft-bit values are performed by a hard and soft output equalizer.

9. A device for error correction of a data signal transmitted via a channel and containing data blocks with associated error checking information, the device comprising:

a hard and soft output equalizer for deciding message bits in a transmitted data block and for calculating soft-bit information relating to decided message bits in the data block, the soft-bit information being representative of a level of reliability of a message bit decision;

an error checking unit for evaluating the associated error checking information with respect to the data block to determine whether a single bit error exits and, if the single bit error exists, determining a location of the single bit error resulting in a located single bit error; and

an error correction unit for correcting the located single bit error if:

a first variable, determined on a basis of the soft-bit information and allows an assessment as to whether more than one decided message bit in the data block is incorrect, satisfies a first threshold value condition; and

a second variable, determined on a basis of the soft-bit information and allows an assessment as to whether the decided message bit to be corrected is incorrect, satisfies a second threshold value condition.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2012
From: INFINEON TECHNOLOGIES DELTA GMBH
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027531/0108 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE NEEDS TO BE CORRECT TO 09/30/2009 PREVIOUSLY RECORDED ON REEL 026685 FRAME 0688. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 15, 2011
From: INFINEON TECHNOLOGIES AG
To: INFINEON TECHNOLOGIES DELTA GMBH
Reel/Frame 027245/0484 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2011
From: INFINEON TECHNOLOGIES AG
To: INFINEON TECHNOLOGIES DELTA GMBH
Reel/Frame 026685/0688 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2005
From: KRUGER, MARTIN; WEBER, MICHAEL; WU, XIAOFENG; YANG, BIN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 017363/0309 →
Priority Claims (2)
DE 101 09 536 · Feb 28, 2001 · national
DE 101 24 180 · May 17, 2001 · national
Continuity (2)
Continuation PCTDE020040500 · Feb 4, 2002
Related Publication 20040078745A1 · Apr 22, 2004