Optical transmission system, fec multiplexer, fec multiplexer/separator, and error correction method
An FEC multiplexing circuit ( 2 ) has a configuration in which a first memory circuit ( 15 ) is arranged on the input stage of a first RS encoding circuit ( 16 ), a second memory circuit ( 17 ) is arranged on the input stage of a second RS encoding circuit ( 18 ), error correction encoding is performed by a combination of different data having two directions, and thereafter, error correction codes are multiplexed to generate an FEC frame. On the other hand, an FEC demultiplexing circuit ( 6 ) has a configuration in which a third memory circuit ( 42 ) is arranged on the output stage of a first RS decoding circuit ( 41 ), a fourth memory circuit ( 44 ) is arranged on the output stage of a second RS decoding circuit ( 43 ), error correction is performed by a combination of different data having two directions, and, thereafter, parallel data read from the fourth memory circuit ( 44 ) are multiplexed to reproduce original information data.
1. An optical transmission system comprising:
an FEC generation section which generates and outputs an FEC frame; and an error correction section which performs error correction based on the FEC frame,
wherein the FEC generation section includes,
a first reading unit which sequentially stores first parallel data generated by demultiplexing information data and, thereafter, changes the order of the storage data on the basis of a predetermined standard to read the data;
a first encoding unit which performs first error correction encoding to the read data to generate first error correction codes;
a second reading unit which sequentially stores the first error correction codes and, thereafter, changes the order of the stored data into the original data to read the data;
a second encoding unit which performs second error correction encoding to the read data to generate second error correction codes; and
a frame generation unit which multiplexes the second error correction codes to generate the FEC frame, and
wherein the error correction section includes,
a first error correction unit which performs error correction by a first decoding process to second parallel data generated by demultiplexing the FEC frame;
a third reading unit which sequentially stores the parallel data subjected to the first decoding process and, thereafter, changes the order of the stored data on the basis of a predetermined standard to read the data;
a second error correction unit which performs error correction by a second decoding process to the read parallel data;
a fourth reading unit which sequentially stores the parallel data subjected to the second decoding process and, thereafter, changes the order of the stored data into the original order to read the data; and
an information data reproduction unit which multiplexes the read parallel data to reproduce the original information data.
2. The optical transmission system according to claim 1 , wherein combinations each constituted by the first error correction unit, the third reading unit, the second error correction unit, and the fourth reading unit are connected to each other in a plurality of stages.
3. An FEC multiplexing device provided on a transmission side of an optical transmission system, the FEC multiplexing device comprising:
a first reading unit which sequentially stores parallel data generated by demultiplexing information data and, thereafter, changes the order of the stored data on the basis of a predetermined standard to read the data;
a first encoding unit which performs first error correction encoding to the read data to generate first error correction codes;
a second reading unit which sequentially stores the first error correction codes and, thereafter, changes the order of the stored data into the original data to read the data;
a second encoding unit which performs second error correction encoding to the read data to generate second error correction codes; and
a frame generation unit which multiplexes the second error correction codes to generate an FEC frame.
4. An FEC demultiplexing device provided on a reception side of a transmission system, the FEC demultiplexing device comprising:
a first error correction unit which performs error correction by a first decoding process to parallel data generated by demultiplexing an FEC frame;
a first reading unit which sequentially stores the parallel data subjected to the first decoding process and, thereafter, changes the order of the stored data on the basis of a predetermined standard to read the data;
a second error correction unit which performs error correction by a second decoding process to the read parallel data;
a second reading unit which sequentially stores the parallel data subjected to the second decoding process and, thereafter, changes the order of the stored data into the original order to read the data; and
an information data reproduction unit which multiplexes the read parallel data to reproduce the original information data.
5. The FEC demultiplexing device according to claim 4 , wherein combinations each constituted by the first error correction unit, the first reading unit, the second error correction unit, and the second reading unit are connected to each other in a plurality of stages.
6. An error correction method comprising:
the FEC generation step of generating and outputting an FEC frame; and the error correction step of performing error correction based on the FEC frame,
wherein the FEC generation step includes,
the first parallel data generation step of demultiplexing information data, adding an OH (OverHead) data region and first and second redundant data regions to the demultiplexed information data, and inserting predetermined OH information into the OH data region to generate first parallel data;
the first reading step of sequentially storing the first parallel data and, thereafter, changes the order of the storage data on the basis of a predetermined standard to read the data;
the first encoding step of performing first error correction encoding to the read data and storing the redundant information of the data in the first redundant data region to generate to generate first error correction codes;
the second reading step of sequentially storing the first error correction codes and, thereafter, changes the order of the stored data into the original data to read the data;
the second encoding step of performing second error correction encoding to the read data and storing the redundant information of the data in the second redundant data region to generate second error correction codes; and
the frame generation step of multiplexing the second error correction codes to generate an FEC frame, and
wherein the error correction step includes,
the second parallel data generation step of demultiplexing the FEC frame and establishing frame synchronism after the demultiplexing to generate second parallel data;
the first error correction step of performing error correction by a first decoding process to the second parallel data;
the third reading step of sequentially storing the parallel data subjected to the error correction and, thereafter, changes the order of the stored data on the basis of a predetermined standard to read the data;
the second error correction step of performing error correction by a second decoding process to the read parallel data; and
the fourth reading step of sequentially storing the parallel data subjected to the error correction and, thereafter, changes the order of the stored data into the original order to read the data; and
the information data reproduction step of separating the overhead information from the read parallel data, deleting the OH data regions and the redundant data regions, and multiplexing the parallel data to reproduce the original information data.
7. The error correction method according to claim 6 , wherein, in the error correction step, a combination of processes performed by the first error correction step, the third reading step, the second error correction step, and the fourth reading step is performed plural times.