Light modulator with integrated drive and control circuitry
Described are MEMS mirror arrays monolithically integrated with CMOS control electronics. The MEMS arrays include polysilicon or polysilicon-germanium components that are mechanically superior to metals used in other MEMS applications, but that require process temperatures not compatible with conventional CMOS technologies. CMOS circuits used with the polysilicon or polysilicon-germanium MEMS structures use interconnect materials that can withstand the high temperatures used during MEMS fabrication. These interconnect materials include doped polysilicon, polycides, and tungsten metal.
1. An integrated circuit comprising:
a. a plurality of active circuit elements;
b. a first conductive layer, including a first plurality of conductive traces, patterned over and in electrical contact with the active circuit elements;
c. a first insulating layer formed over the first conductive layer;
d. a second conductive layer, including a second plurality of conductive traces, patterned over the first insulating layer and in electrical contact with the active circuit elements;
e. a second insulating layer formed over the second conductive layer; and
f. a third conductive layer, including a third plurality of conductive traces, patterned over the second insulating layer and in electrical contact with the active circuit elements, the third conductive layer having a resistivity of at least 5×10 −6 ohms-cm.
2. The integrated circuit of claim 1 , wherein at least two of the first, second, and third conductive layers are predominately silicon.
3. The integrated circuit of claim 1 , wherein the third conductive layer includes at least one of Mo, W, Ti, and Co.
4. The integrated circuit of claim 1 , further comprising a MEMS actuator disposed over the third conductive layer and in electrical contact with the active circuit elements via the third conductive layer.
5. The integrated circuit of claim 4 , wherein the MEMS actuator comprises a mirror disposed over a mirror substrate.
6. The integrated circuit of claim 5 , wherein the mirror substrate is of a substrate material exhibiting a fracture strength of at least 1 GPa.
7. The integrated circuit of claim 6 , wherein the mirror substrate is predominantly silicon.
8. The integrated circuit of claim 1 , wherein the resistivity of the third conductive layer is at least 30×10 −6 ohms-cm.
9. The integrated circuit of claim 1 , wherein at least one of the first and second conductivity layers has a second resistivity greater than 5×10 −6 ohms-cm.
10. The integrated circuit of claim 9 , wherein second resistivity is at least 30×10 −6 ohms-cm.