IP Library Granted Patent US 7,145,797
Granted Patent B2
US 7,145,797 · App. 11/003,904 · Granted Dec 5, 2006

Selecting a magnetic memory cell write current

Assignee: Hewlett-Packard Development Company, L.P.
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Quick Facts
Patent No.
US 7,145,797
App. No.
11/003,904
Granted
Dec 5, 2006
Kind
B2
Abstract

The invention includes an apparatus and method for selecting a desirable magnitude of a magnetic memory cell write current. The method includes determining a minimal magnitude of write current for writing to the magnetic memory cell, determining a maximal magnitude of write current for writing to the magnetic memory cell, and calculating the selected magnitude of magnetic memory cell write current based on the minimal magnitude of write current and the maximal magnitude of write current.

Claims (37)

1. An apparatus for writing to memory cells comprising:

a current digital to analog converter for generating a write current that is coupled to the memory cells; and

a current regulator for selecting a magnitude of the write current generated by the current digital to analog converter that is based upon a minimal threshold magnitude of write current and a maximal threshold magnitude of write current.

2. The apparatus of claim 1 , wherein the minimum threshold magnitude of write current is a magnitude of write current required to cause at least one test magnetic memory cell to switch.

3. The apparatus of claim 1 , wherein the maximum threshold magnitude of write current is a magnitude of current required to cause half-select errors within at least one test magnetic memory cell.

4. The apparatus of claim 1 , wherein the current regulator averages the minimal threshold magnitude of write current and the maximal threshold magnitude of write current.

5. The apparatus of claim 1 , wherein the current regulator comprises an averaging counter.

6. A method of selecting a magnitude of a magnetic memory cell digital to analog converter write current, comprising:

determining a minimal magnitude of write current for writing to a magnetic memory cell;

determining a maximal magnitude of write current for writing to the magnetic memory cell;

calculating the selected magnitude of magnetic memory cell digital to analog converter write current based on the minimal magnitude of write current and the maximal magnitude of write current.

7. The method of selecting a magnitude of a magnetic memory digital to analog converter cell write current of claim 6 , wherein calculating the selected magnitude of magnetic memory cell digital to analog converter write current based on the minimal magnitude of write current and the maximal magnitude of write current comprises averaging the minimal magnitude of write current and the maximal magnitude of write current.

8. The method of selecting a magnitude of a magnetic memory digital to analog converter cell write current of claim 6 , wherein the minimum magnitude of write current is a magnitude of write current required to cause at least one test magnetic memory cell to switch.

9. The method of selecting a magnitude of a magnetic memory digital to analog converter cell write current of claim 6 , wherein the maximum magnitude of write current is a magnitude of current required to cause half-select errors within at least one test magnetic memory cell.

10. The method of selecting a magnitude of a magnetic memory digital to analog converter cell write current of claim 6 , wherein averaging the minimal magnitude of write current and the maximal magnitude of write current is performed by an averaging counter.

11. The method of selecting a magnitude of a magnetic memory digital to analog converter cell write current of claim 10 , wherein a count value of the averaging counter determines the selected magnitude of the magnetic memory digital to analog converter cell write current.

12. A method for determining a magnitude of a digital to analog converter write current for a magnetic memory cell using an averaging counter comprising:

incrementing a count value of the averaging counter until a minimum write current has been reached;

doubling the count value within the averaging counter;

continue incrementing the count value of the averaging counter until a maximum write current has been reached;

halving the count value of the averaging counter;

setting the magnitude of the digital to analog converter write current based upon the count value of the averaging counter.

13. The method for determining a magnitude of a digital to analog converter write current of claim 12 , wherein incrementing a count value of an averaging counter until a minimum write current has been reached comprises:

selecting a default hard axis write current;

incrementing the averaging counter, thereby incrementing an easy axis write current until a magnetic orientation of a test memory cell changes states.

14. The method for determining a magnitude of a digital to analog converter write current of claim 12 , wherein doubling the count value within the averaging counter comprises:

shifting bits one position to double the counter value, wherein the averaging counter includes a binary counter.

15. The method for determining a magnitude of a digital to analog converter write current of claim 12 , wherein continue incrementing the count value of the averaging counter until a maximum write current has been reached comprises:

zeroing the hard axis write current;

continue incrementing the binary counter until the test memory cell changes states.

16. The method for determining a magnitude of a digital to analog converter write current of claim 12 , wherein halving the count value of the averaging counter comprises:

shifting bits one position to halve the counter value, wherein the averaging counter includes a binary counter.

17. The method for determining a magnitude of a digital to analog converter write current of claim 12 , wherein setting the magnitude of the digital to analog converter write current based upon the count value of the averaging counter comprises:

loading the count value of the averaging counter into a binary counter that drives a current digital to analog converter (iDAC).

18. The method for determining a magnitude of a digital to analog converter write current of claim 12 , wherein the minimum current is a magnitude of write current required to cause at least one test magnetic memory cell to switch.

19. The method for determining a magnitude of a digital to analog converter write current of claim 12 , wherein the maximum current is a magnitude of current required to cause half-select errors within at least one test magnetic memory cell.

20. The method for determining a magnitude of a digital to analog converter write current of claim 12 , wherein the write current that is magnetically coupled to at least one test magnetic memory cell includes a continuous series of pulses, in which the pulses alternate in polarity.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2007
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 019733/0127 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2004
From: PERNER, FREDERICK A.
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 016066/0888 →
Continuity (2)
Continuation In Part 1072580300 · Dec 2, 2003
Related Publication 20050117412A1 · Jun 2, 2005