Nitridation of STI liner oxide for modulating inverse width effects in semiconductor devices
A method ( 1300 ) of forming a semiconductor device comprising an isolation structure is disclosed, and includes forming a trench region within a semiconductor body ( 1308 ). Then, surfaces of the trench region are nitrided ( 1310 ) via a nitridation process. An oxidation process is performed that combines with the nitrided surfaces ( 1312 ) to form a nitrogen containing liner. Subsequently, the trench region is filled with dielectric material ( 1316 ) and then planarized ( 1318 ) to remove excess dielectric fill material.
1. A method of fabricating a semiconductor device containing isolation structures, the method comprising:
defining isolation regions and active regions of a semiconductor body;
forming trench regions within the isolation regions of the semiconductor body;
nitriding surfaces of the trench regions including forming a nitride compound;
oxidizing the nitrided surfaces of the trench regions including forming a nitride compound to form nitrogen containing liners; and
filling the trench regions with a dielectric fill material.
2. The method of claim 1 , wherein forming trench regions within isolation regions comprises forming a resist mask that exposes the isolation regions and etching the exposed regions for a selected time to form the trench regions with a bottom and sidewalls.
3. The method of claim 1 , wherein forming trench regions within isolation regions comprises forming a hard mask that exposes the isolation regions and etching the exposed regions to form the trench regions with a bottom and sidewalls.
4. The method of claim 3 , wherein the hard mask is comprised of silicon nitride.
5. The method of claim 1 , wherein nitriding surfaces of the trench regions comprises performing a plasma based nitridation process.
6. The method of claim 2 , wherein the plasma nitridation process is performed for a duration selected to obtain a desired nitrogen concentration at liner/substrate interfaces.
7. The method of claim 1 , wherein the thermal growth process is performed for a duration selected according to a desired thickness for the nitrogen containing liners.
8. The method of claim 1 , further comprising performing an anneal after forming the nitrogen containing liners.
9. The method of claim 1 , wherein filling the trench regions comprises depositing oxide over the device.
10. The method of claim 1 , wherein filling the trench regions comprises:
forming a hard mask layer prior to forming the trench regions;
depositing an oxide material in the trench regions using a high density plasma deposition process; and
planarizing the device using the hard mask as a planarization stop.
11. The method of claim 10 , wherein planarizing the device comprises performing a chemical mechanical polish of the oxide material.
12. The method of claim 1 , further comprising forming transistor devices within the active regions of the semiconductor body.
13. A method of fabricating a semiconductor device containing isolation structures, the method comprising:
forming a pad oxide layer over a semiconductor body;
forming a hard mask layer on the pad oxide layer;
forming a resist mask on the hard mask layer that exposes the hard mask layer within isolation regions and covers the hard mask layer within active regions of the device;
patterning the hard mask layer to expose the semiconductor body within isolation regions;
performing an etch process using the hard mask layer as a mask that forms trench regions within the isolation regions;
nitriding exposed surfaces of the trench regions including forming a nitride compound;
oxidizing the exposed surfaces of the trench regions to form nitrogen containing liners; and
filling the trench regions with a dielectric fill material.
14. The method of claim 13 , further comprising removing the resist layer prior to performing the etch process that forms trench regions.
15. The method of claim 13 , further comprising removing the hard mask layer after filling the trench regions with the dielectric fill material.
16. A method of fabricating a semiconductor device containing isolation structures, the method comprising:
defining an isolation region of the semiconductor device;
performing an etch process using a mask that forms a trench region within the isolation region, wherein the trench region comprises a bottom surface and sidewall surfaces;
nitriding the bottom surface and the sidewall surfaces of the trench region;
oxidizing the nitrided bottom surface and the sidewall surfaces of the trench regions to form a nitrogen containing liner;
repairing damage incurred during the oxidizing with an anneal; and
filling the trench region with a dielectric fill material.
17. The method of claim 16 , wherein the anneal is performed for a duration selected according to a thickness of the nitrogen containing liner.