IP Library Granted Patent US 7,286,018
Granted Patent B2
US 7,286,018 · App. 11/231,800 · Granted Oct 23, 2007

Transistor circuit

Assignee: Matsushita Electric Industrial Co., Ltd.
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Quick Facts
Patent No.
US 7,286,018
App. No.
11/231,800
Granted
Oct 23, 2007
Kind
B2
Abstract

The transistor circuit 1 includes a plurality of transistor cells 10 each having a transistor 11 , a base ballast resistor 12 , a capacitor 13 , and an inductor 14 . The transistors 11 have the respective collectors commonly connected to a collector terminal 1 c of the transistor circuit 1 and the respective emitters commonly connected to an emitter terminal 1 e thereof. Each base ballast resistor 12 is connected to bases of the transistor 11 at one end and to a base terminal 1 b of the transistor circuit 1 at the other end. The capacitor 13 is serially connected to the inductor 14 , thus to form a serial resonant circuit 15 , which is connected in parallel with the base ballast resistor 12 and provided between the bases of the transistor 11 and the base terminal 1 b of the transistor circuit 1 and connected thereto.

Claims (14)

1. A transistor circuit comprising a plurality of transistor cells, wherein each of the transistor cells includes:

a transistor having at least one collector finger connected to a collector terminal of the transistor circuit and having at least one emitter finger connected to an emitter terminal of the transistor circuit,

a base ballast resistor provided between a base terminal of the transistor circuit and at least one base finger of the transistor, the base ballast resistor connected thereto; and

a serial resonant circuit connected in parallel with the base ballast resistor,

wherein the serial resonant circuit is constructed such that one of a microstrip line and a strip line is serially connected to a capacitor.

2. A transistor circuit comprising a plurality of transistor cells, wherein each of the transistor cells includes:

a transistor having at least one collector finger connected to a collector terminal of the transistor circuit and having at least one emitter finger connected to an emitter terminal of the transistor circuit,

N base ballast resistors provided between a base terminal of the transistor circuit and N base fingers of the transistor, respectively, the N base ballast resistors connected thereto; and

N serial resonant circuits connected in parallel with the N base ballast resistors, respectively,

wherein the serial resonant circuit is constructed such that one of a microstrip line and a strip line is serially connected to a capacitor.

3. The transistor circuit according to claim 1 , wherein the microstrip line or the strip line is shared by the two or more transistor cells.

4. The transistor circuit according to claim 2 , wherein the microstrip line or the strip line is shared by the two or more transistor cells.

5. The transistor circuit according to claim 1 , wherein at least the base ballast resistor and the capacitor are integrated on a semiconductor substrate.

6. The transistor circuit according to claim 2 , wherein at least the base ballast resistor and the capacitor are integrated on a semiconductor substrate.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2014
From: PANASONIC CORPORATION
To: COLLABO INNOVATIONS, INC.
Reel/Frame 033021/0806 →
LIEN Recorded Jan 13, 2014
From: COLLABO INNOVATIONS, INC.
To: PANASONIC CORPORATION
Reel/Frame 031997/0445 →
CHANGE OF NAME Recorded Jan 8, 2014
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 031947/0358 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2005
From: MAKIHARA, HIROKAZU; TATEOKA, KAZUKI; KAWASHIMA, KATSUHIKO; MATSUDA, SHINGO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 016848/0635 →
Priority Claims (1)
JP 2004-293006 · Oct 5, 2004 · national
Continuity (1)
Related Publication 20060081878A1 · Apr 20, 2006