IP Library Granted Patent US 7,362,290
Granted Patent B2
US 7,362,290 · App. 10/950,389 · Granted Apr 22, 2008

Image signal correcting circuit, image processing method, electro-optical device and electronic apparatus

Assignee: Seiko Epson Corporation
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Quick Facts
Patent No.
US 7,362,290
App. No.
10/950,389
Granted
Apr 22, 2008
Kind
B2
Abstract

To provide a circuit for preventing degradation of a display quality caused by horizontal crosstalk. An image signal correcting circuit supplies a corrected image signal to a display panel to apply the image signal using the corresponding data line after pre-charging each data line to the predetermined voltage, for a pixel electrode located at the selected scanning line. The image signal correcting circuit comprises a subtractor 312 for calculating a difference between a gray scale level shown as a reference signal Ref and a gray scale level of the pixel indicated by an image signal VID, an integrator 314 for integrating the result of the subtraction output to one row of pixel located at the selected scanning line, and an adder 322 that provides the integration Int multiplied by the coefficient k 1 as the corrected image signal.

Claims (32)

1. An image signal correcting circuit which corrects and supplies an image signal to a display which has a plurality of scanning lines; a plurality of data lines; a plurality of pixels arranged correspondingly to intersections of the plurality of scanning lines and the plurality of data lines; pixel electrodes constituting the pixels; and counter electrodes facing the pixel electrodes, with an electro-optical material therebetween, wherein the image signal is applied to a pixel electrode corresponding to a selected scanning line and a selected data line,

the image signal correcting circuit comprising:

a subtractor for calculating the difference between a reference gray scale level and a gray scale level of a displayed pixel according to an image signal;

an integrator which integrates the result obtained by the subtractor with respect to pixels corresponding to a selected scanning line; and

an adder which adds the result obtained by the integrator to each of image signals applied to pixels corresponding to a subsequently selected scanning line; and outputs the sum of the result obtained by the integrator and the image signals as corrected image signals.

2. The image signal correcting circuit according to claim 1 ,

wherein the reference gray scale level corresponds to a gray display.

3. The image signal correcting circuit according to claim 1 , further comprising:

a circuit for gradually reducing or increasing the result obtained by the integrator, along with horizontal scanning of pixels located at a subsequently selected scanning line from one end to the other end.

4. The image signal correcting circuit according to claim 1 ,

the result obtained by the integrator is multiplied by the predetermined coefficient and supplied to the adder.

5. A method for correcting an image signal, in which after precharging each data line to a predetermined voltage, an image signal is corrected and supplied to a display panel that applies the image signal to pixel electrodes located at a selected scanning line through a corresponding data line, the display panel comprising a plurality of scanning lines; a plurality of data lines; a plurality of switching elements arranged correspondingly to intersections of the plurality of scanning lines and the plurality of data lines and interposed between each data line and each pixel electrode corresponding to each switching element, wherein the switching element is turned on when the scanning line is selected; and counter electrodes facing the pixel electrodes with an electro-optical material therebetween, the method comprising the steps of:

calculating, with a subtractor, the difference between a reference gray scale level and a gray scale level of a pixel indicated by an image signal;

integrating, with an integrator, the result obtained by the subtractor to pixels corresponding to one row of a selected scanning line; and

adding the result obtained by the integrator to each of image signals applied to pixels corresponding to one row of a subsequently selected scanning line to output the sum as a corrected image signal.

6. An electro-optical device comprising;

a plurality of scanning lines;

a plurality of data lines;

a plurality of switching elements arranged correspondingly to intersections of the plurality of scanning lines and the plurality of data lines and interposed between each data line and each pixel electrode corresponding to each switching element,

counter electrodes facing the pixel electrodes with an electro-optical material therebetween, and an image signal correcting circuit that supplies an image signal to the data lines,

wherein the image signal correcting circuit comprises:

a subtractor which calculates the difference between a reference gray scale level and a gray scale level of a pixel indicated by an image signal; and

an integrator which integrates the result obtained by the subtractor with respect to pixels corresponding to a selected scanning line; and

an adder which adds the result obtained by the integrator to each of image signals applied to pixels corresponding to a subsequently selected scanning line ;and outputs the sum of the result obtained by the integrator and the image signals as corrected image signals, and

the corrected image signals are supplied to the pixel electrodes located at a selected scanning line through a corresponding data line after precharging each data line to a predetermined voltage.

7. The electro-optical device according to claim 6 ,

wherein the reference gray scale level corresponds to a gray display.

8. The electro-optical device according to claim 6 , further comprising:

a circuit for gradually reducing or increasing the result obtained by the integrator, along with horizontal scanning of pixels located at a subsequently selected scanning line from one end to the other end.

9. The electro-optical device according to claim 6 ,

the result obtained by the integrator is multiplied by the predetermined coefficient and supplied to the adder.

10. An electronic apparatus comprising the electro-optical device according to claim 6 as a display unit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2019
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 050197/0212 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2005
From: AOKI, TORU
To: SEIKO EPSON CORPORATION
Reel/Frame 015607/0728 →
Priority Claims (2)
JP 2003-369052 · Oct 29, 2003 · national
JP 2004-242233 · Aug 23, 2004 · national
Continuity (1)
Related Publication 20050104829A1 · May 19, 2005