Two-wire chip-to-chip interface

1. A method for transmitting data over a two wire serial interface, comprising the steps of:

generating a preamble at a master device over a data line and a clock line of the two wire serial interface, the step of generating the preamble further comprising the steps of:

transmitting a clock signal on the data line of the two wire serial interface, to a slave device;

transmitting a data signal at a logical level on the clock line of the two wire serial interface to the slave device;

maintaining the data signal at the logical level for a first number of pulses of the clock signal on the data line;

transmitting a data block consisting of address bits via the data signal and data bits on the data line of the two wire serial interface after generation of the preamble; and

switching the clock signal from the data line to the clock line to transmit the clock signal on the clock line of the two wire serial interface after the generation of the preamble to the slave device.

2. The method of claim 1 , wherein the first number of pulses of the preamble are uniquely associated only with the slave device of a plurality of slave devices.

3. The method of claim 1 , wherein the data wire and the clock wire of the two wire interface are also part of a three wire interface.

4. A method for receiving data over a two wire serial interface between a master device and a slave device, comprising the steps of:

receiving a control word including a preamble and a data block at the slave device;

detecting the preamble at the slave device over a data line and a clock line of the two wire serial interface, the step of detecting further comprising the steps of:

detecting a data signal at a logical level on the clock line of the two wire serial interface;

detecting a clock signal on the data line of the two wire serial interface for a predetermined number of clock pulses associated with the slave device while the data signal remains at the logical level on the clock line; and

receiving a data block consisting of address bits and data via the data signal after detecting the preamble on the two wire serial interface; and

receiving the clock signal which has been switched to the clock line of the two wire serial interface after detecting the preamble.

5. The method of claim 4 further including the step of:

determining a number of pulses on the data line;

determining when the number of pulses corresponds to the predetermined number of pulses associated with the second device.

6. The method of claim 4 , wherein the step of enabling further includes the steps of:

providing an indication of detection of the clock signal for the predetermined number of pulses; and

enabling the second device to respond to the control word responsive to the indication of detection.

7. The method of claim 4 , further comprising the step of performing a Read operation between the first device and the second device.

8. The method of claim 4 , further comprising the step of performing a Write operation between the first device and the second device.

9. The method of claim 4 , further including the step of applying at least one of a pull-up or pull-down to a SLEN input of the second device.

10. A method for communicating data over a two wire serial interface between a master device and at least one slave device, comprising the steps of:

generating a preamble at the master device over a data line and a clock line of the two wire serial interface, the step of generating further comprising the steps of:

transmitting a clock signal on the data line of the two wire serial interface to a slave device;

transmitting a data signal at a first logical level on the clock line of the two wire serial interface to the slave device;

maintaining the data signal on the clock line at the first logical level for a first number of pulses of the clock signal on the data line;

transmitting a data block consisting of address bits and data bits via the data signal on the data line of the two wire serial interface after the preamble;

switching the clock signal from the data line to the clock line of the two wire serial interface after the generation of the preamble;

receiving the preamble at the slave device;

detecting the preamble at the at least one slave device over the data line and the clock line of the two wire serial interface, the step of detecting further comprising the steps of:

detecting the data signal at the first logical level on the clock line of the two wire serial interface; and

detecting the clock signal on the data line of the two wire serial interface for a predetermined number of pulses associated with the slave device while the data signal remains at the first logical level on the clock line;

receiving the data block consisting of address bits and data via the data signal on the data line of the two-wire serial interface after detecting the preamble; and

receiving the clock signal on the second line of the two wire serial interface after detecting the preamble.

11. The method of claim 10 , wherein the first number of pulses of the preamble are uniquely associated only with the slave device of a plurality of slave devices.

12. The method of claim 10 , wherein the data wire and the clock wire of the two wire interface are also part of a three wire interface.

13. The method of claim 10 further including the step of:

determining a number of pulses on the data line;

determining when the number of pulses corresponds to the predetermined number of pulses associated with the at least one slave device.

14. The method of claim 10 , wherein the step of detecting the preamble further includes the steps of:

providing an indication of detection of the clock signal for the predetermined number of pulses; and

enabling the at least one slave device to respond to the detection of the preamble responsive to the indication of detection.

15. The method of claim 10 , further comprising the step of performing a Read operation between the master device and the at least one slave device.

16. The method of claim 10 , further comprising the step of performing a Write operation between the master device and the at least one slave device.

17. The method of claim 10 , further including the step of applying at least one of a pull-up or pull-down to a SLEN input of the at least one slave device.

18. A method for communicating data over a serial interface between a master device and at least one slave device, comprising the steps of:

generating a preamble at the master device over a serial data line and a serial clock line of the two wire serial interface, the step of generating further comprising the steps of:

transmitting a clock signal on the serial data line of the two wire serial interface, to a slave device;

transmitting a data signal at a first logical level on the serial clock line to the slave device;

maintaining the data signal at the first logical level for a first number of pulses of the clock signal;

receiving the preamble at the slave device;

detecting the preamble at the slave device over the serial data line and the serial clock line, the step of detecting further comprising the steps of:

detecting the data signal at the first logical level on the serial clock line of the two wire serial interface;

detecting the clock signal on the serial data line of the two wire serial interface for a predetermined number of pulses associated with the second device while the data signal remains at the first logical level on the serial clock line;

receiving on the serial data line a data block consisting of address bits and data via the data signal after detecting the preamble; and

receiving the clock signal which has been switched to the serial clock line of the two wire serial interface after detecting the preamble.

19. The method of claim 18 , further including the step of applying at least one of a pull-up or pull-down to a SLEN input of the at least one slave device.