IP Library Granted Patent US 7,436,338
Granted Patent B2
US 7,436,338 · App. 11/643,212 · Granted Oct 14, 2008

Current mode sigma-delta modulator

Assignee: SLICEX, Inc.
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Quick Facts
Patent No.
US 7,436,338
App. No.
11/643,212
Granted
Oct 14, 2008
Kind
B2
Abstract

Exemplary sigma-delta modulators include a summing block configured to receive an input signal, a noise shaping unit configured to process an output signal of the summing block, a quantizer configured to quantize an output signal of the noise shaping unit, and a current-mode digital-to-analog converter (“DAC”) configured to convert an output of the quantizer into an analog signal and input the analog signal into the summing block in a closed loop feedback manner.

Claims (68)

1. A sigma-delta modulator comprising:

a first summing block configured to receive an input signal;

a noise shaping unit configured to process an output signal of said first summing block;

a second summing block configured to sum an output from said noise shaping unit with a signal from a dither generator;

a quantizer configured to quantize an output signal of said second summing block; and

a digital-to-analog converter (“DAC”) configured to convert an output of said quantizer into an analog signal and input said analog signal into said first summing block in a closed loop feedback manner;

wherein said DAC comprises a current mode DAC.

2. The sigma-delta modulator of claim 1 , wherein said quantizer comprises a current-mode analog-to-digital converter.

3. The sigma-delta modulator of claim 1 , wherein said noise shaping unit comprises a current mode noise shaping unit.

4. The sigma-delta modulator of claim 1 , further comprising a decimator communicatively coupled to said quantizer, wherein said decimator is configured to filter a digital output of said quantizer.

5. The sigma-delta modulator of claim 1 , wherein said current mode DAC comprises:

a plurality of cascode current sources; and

an op-amp configured to maintain a constancy of an output current of said current mode DAC over a pre-determined voltage or current range. (PRIOR ART TEACHES DIFF AMP, NOT OP AMP).

6. The sigma-delta modulator of claim 1 , further comprising:

a dither generator configured to add dither to a signal processed by said sigma-delta modulator.

7. The sigma-delta modulator of claim 1 , further comprising:

an anti-aliasing filter configured to filter said input signal prior to being input into said summing block.

8. A sigma-delta modulator comprising:

a summing block configured to receive an input signal;

a noise shaping unit configured to process an output signal of said summing block;

a quantizer configured to quantize an output signal of said noise shaping unit;

a digital-to-analog converter (“DAC”) configured to convert an output of said quantizer into an analog signal and input said analog signal into said summing block in a closed loop feedback manner; and

a dither generator configured to add dither to a signal processed by said sigma-delta modulator;

wherein said dither generator is configured to counteract one or more effects of one or more idle tones generated by said sigma-delta modulator.

9. A sigma-delta modulator comprising:

a summing block configured to receive an input signal;

a noise shaping unit configured to process an output signal of said summing block;

a quantizer configured to quantize an output signal of said noise shaping unit; and

a digital-to-analog converter (“DAC”) configured to convert an output of said quantizer into an analog signal and input said analog signal into said summing block in a closed loop feedback manner;

wherein said quantizer comprises one or more switchable resistors, wherein said switchable resistors are configured to add dither to a reference signal for said quantizer.

10. A sigma-delta modulator comprising:

a summing block configured to receive an input signal;

a noise shaping unit configured to process an output signal of said summing block;

a quantizer configured to quantize an output signal of said noise shaping unit; and

a digital-to-analog converter (“DAC”) configured to convert an output of said quantizer into an analog signal and input said analog signal into said summing block in a closed loop feedback manner;

wherein said noise shaping unit comprises:

one or more integrators;

wherein one or more of said integrators comprises one or more switchable feedback capacitors; and

wherein said switchable capacitors are configured to adjust one or more coefficients within said noise shaping unit such that said sigma-delta modulator recovers from an overload condition.

11. A sigma-delta modulator comprising:

a summing block configured to receive an input signal;

a noise shaping unit configured to process an output signal of said summing block;

a quantizer configured to quantize an output signal of said noise shaping unit;

a digital-to-analog converter (“DAC”) configured to convert an output of said quantizer into an analog signal and input said analog signal into said summing block in a closed loop feedback manner; and

an anti-aliasing filter configured to filter said input signal prior to being input into said summing block;

wherein said anti-aliasing filter comprises one or more stages each comprising an op-amp and a bank of one or more feedback resistors, and wherein said feedback resistors are configured to adjust a gain of said anti-aliasing filter to alleviate an overload condition.

12. A method comprising:

receiving an input signal at a summing block;

processing an output signal of said summing block with a noise shaping unit;

quantizing an output signal of said noise shaping unit with a quantizer;

converting an output of said quantizer into an analog signal with a current mode digital-to-analog converter (“DAC”);

inputting said analog signal into said summing block to be subtracted from said input signal in a closed loop feedback manner; and

adjusting one or more coefficients within said noise shaping unit such to overcome an overload condition.

13. The method of claim 12 , wherein said noise shaping unit comprises a current mode noise shaping unit.

14. The method of claim 12 , further comprising filtering a digital output of said quantizer.

15. The method of claim 12 , further comprising maintaining a constancy of an output current of said current mode DAC over a pre-determined voltage range.

16. The method of claim 12 , further comprising adding dither to a signal processed by said sigma-delta modulator to counteract one or more effects of one or more idle tones.

17. The method of claim 12 , further comprising adding dither a reference signal of said quantizer to counteract one or more effects of one or more idle tones.

18. The method of claim 12 , further comprising:

filtering said input signal with an anti-aliasing filter, said anti-aliasing filter comprising one or more stages each comprising an op-amp and a bank of one or more feedback resistors; and

adjusting a gain of said anti-aliasing filter to alleviate an overload condition.

19. A system comprising:

means for receiving an input signal at a summing block;

means for processing an output signal of said summing block with a noise shaping unit;

means for adding a dither signal from a dither generator to an output of said noise shaping unit;

means for quantizing an output signal of said noise shaping unit plus said dither signal with a quantizer;

means for converting an output of said quantizer into an analog current; and

means for inputting said analog signal into said summing block to be subtracted from said input signal in a closed loop feedback manner.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2015
From: CREST SEMICONDUCTORS, INC
To: CINNABAR SEMICONDUCTORS, INC
Reel/Frame 037070/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2011
From: CINNABAR SEMICONDUCTORS, INC.
To: CREST SEMICONDUCTORS, INC.
Reel/Frame 027019/0433 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2011
From: SIFLARE, INC
To: CINNABAR SEMICONDUCTORS, INC.
Reel/Frame 027008/0190 →
CHANGE OF NAME Recorded Aug 16, 2011
From: SLICEX INCORPORATED
To: SIFLARE, INC
Reel/Frame 026756/0554 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2006
From: HALES, REX K.; SMITH, KENT
To: SLICEX, INC.
Reel/Frame 018718/0718 →
Continuity (4)
Provisional Application 6075322700 · Dec 21, 2005
Provisional Application 6075327900 · Dec 21, 2005
Provisional Application 6075328000 · Dec 21, 2005
Related Publication 20070139241A1 · Jun 21, 2007