IP Library Granted Patent US 7,486,809
Granted Patent B2
US 7,486,809 · App. 11/041,265 · Granted Feb 3, 2009

Capacitance detection device, fingerprint sensor, biometric authentication device, and method for searching capacitance detection condition

Assignee: Seiko Epson Corporation
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Quick Facts
Patent No.
US 7,486,809
App. No.
11/041,265
Granted
Feb 3, 2009
Kind
B2
Abstract

Aspects of the invention can provide a fingerprint sensor for searching for a detection condition in a short period of time in order to read information of ridges and valleys of a fingerprint as changes in capacitance. The fingerprint sensor of the invention can include a plurality of capacitance detection circuits that output a detection signal having ridge/valley information of a fingerprint based on capacitance formed between the sensor and a fingertip surface, a fingerprint detection part in which the plurality of capacitance detection circuits are arranged to intersect with one another in a row direction and a column direction, a plurality of scanning lines, a scanning line driver for driving the scanning line, a plurality of data lines, a data line driver for driving the data line, and search device for searching for a detection condition of ridge/valley information by changing detection conditions of the ridge/valley information in a state that the plurality of capacitance detection circuits arranged along any one of the plurality of scanning lines are being selected.

Claims (37)

1. A capacitance detection device, comprising:

a fingerprint detecting part including a plurality of data lines, a plurality of scanning lines, and a plurality of capacitance detector circuits positioned at a plurality of intersections between the plurality of data lines and the plurality of scanning lines;

a data line driver electrically connected to the plurality of data lines, the data line driver including a first shift register and an adjustment control circuit, the data line driver being configured to select one line of the plurality of data lines by the adjustment control circuit; and

a scanning line driver electrically connected to the plurality of scanning lines, the scanning line driver including a second shift register, the scanning line driver being configured to select the plurality of scanning lines during the one line of the plurality of data lines being selected.

2. The capacitance detection device according to claim 1 , the adjustment control circuit including:

an inverter;

a signal line; and

a NAND configured to receive a first signal from the inverter and a second signal from the signal line, the NAND being configured to output a third signal to control the one line of the plurality of data lines.

3. The capacitance detection device according to claim 1 , the first shift register being configured to control all the plurality of data lines and the adjustment control circuit being configured to control only the one line of the plurality of data lines.

4. The capacitance detection device according to claim 2 , the data line driver further including a first buffer, the adjustment control circuit being positioned between the first shift register and the fingerprint detecting part, the first buffer being positioned between the adjustment control circuit and the fingerprint detecting part.

5. The capacitance detection device according to claim 3 , the scanning line driver further inducing a second buffer, the second buffer being positioned between the second shift register and the fingerprint detecting part.

6. The capacitance detection device according to claim 1 , further comprising:

an amplifier circuit electrically connected to the plurality of data lines via a plurality of switches to supply the plurality of data lines a reference potential, the amplifier circuit being configured to control the reference potential to be set to various values.

7. The capacitance detection device according to claim 6 , the amplifier circuit being configured to control the reference potential to be set to various values during the data line driver selecting one line of the plurality of data lines by the adjustment control circuit.

8. The capacitance detection device according to claim 1 , the scanning line driver being configured to select the plurality of scanning lines sequentially during the one line of the plurality of data lines being selected.

9. The capacitance detection device according to claim 1 , the scanning line driver being configured to select the plurality of scanning lines more than two times during the one line of the plurality of data lines being selected.

10. The capacitance detection device according to claim 1 , the data line driver being configured to select the one line of the plurality of data lines by the adjustment control circuit during a preparation period and the scanning line driver being configured to select the plurality of scanning lines during the preparation period.

11. The capacitance detection device according to claim 10 , the data line driver being configured to select the plurality of data lines by the first shift register during a fingerprint detection period and the scanning line driver being configured to select the plurality of scanning lines during the fingerprint detection period.

12. A fingerprint sensor, comprising:

the capacitance detection device according to claim 1 , the plurality of capacitance detector circuits being worked as a sensor so as to read ridge/valley information of a fingerprint.

13. A biometric authentication device comprising:

the fingerprint sensor according to claim 12 .

14. A capacitance detection device, comprising:

a fingerprint detecting part including a plurality of data lines, a plurality of scanning lines, and a plurality of capacitance detector circuits positioned at a plurality of intersections between the plurality of data lines and the plurality of scanning lines;

a data line driver electrically connected to the plurality of data lines, the data line driver including a first shift register, the data line driver being configured to select one line of the plurality of data lines during a preparation period, the data line driver being configured to select the plurality of data lines during a fingerprint detection period; and

a scanning line driver electrically connected to the plurality of scanning lines, the scanning line driver including a second shift register, the scanning line driver being configured to select the plurality of scanning lines during the preparation period, the scanning line driver being configured to select the plurality of scanning lines during the fingerprint detection period.

15. The capacitance detection device according to claim 12 , further comprising:

an amplifier circuit electrically connected to the plurality of data lines via a plurality of switches to supply the plurality of data lines a reference potential, the amplifier circuit being configured to control the reference potential to be set to various values during the preparation period.

16. A fingerprint sensor comprising:

the capacitance detection device according to claim 14 , the plurality of capacitance detector circuits being worked as a sensor so as to read ridge/valley information of a fingerprint.

17. A biometric authentication device comprising:

the fingerprint sensor according to claim 16 .

18. A capacitance detection device, comprising:

a fingerprint detecting part including a plurality of data lines, a plurality of scanning lines, and a plurality of capacitance detector circuits positioned at a plurality of intersections between the plurality of data lines and the plurality of scanning lines;

a data line driver electrically connected to the plurality of data lines, the data line driver including a first shift register, the data line driver being configured to select one line of the plurality of data lines during a preparation period;

a scanning line driver electrically connected to the plurality of scanning lines, the scanning line driver including a second shift register, the scanning line driver being configured to select the plurality of scanning lines during the preparation period; and

an amplifier circuit electrically connected to the plurality of data lines via a plurality of switches to supply the plurality of data lines a reference potential, the amplifier circuit being configured to control the reference potential to be set to various values during the preparation period.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2018
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 047567/0006 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2005
From: HARA, HIROYUKI; MIYASAKA, MITSUTOSHI
To: SEIKO EPSON CORPORATION
Reel/Frame 016224/0299 →
Priority Claims (1)
JP 2004-040375 · Feb 17, 2004 · national
Continuity (1)
Related Publication 20050179446A1 · Aug 18, 2005