IP Library Granted Patent US 7,497,920
Granted Patent B2
US 7,497,920 · App. 11/218,524 · Granted Mar 3, 2009

Method of manufacturing semiconductor device

Assignee: DENSO CORPORATION
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Quick Facts
Patent No.
US 7,497,920
App. No.
11/218,524
Granted
Mar 3, 2009
Kind
B2
Abstract

In a manufacturing method of a semiconductor device, a tape having an adhesive material is bonded to a first surface of a semiconductor substrate so as to form a space between a groove portion and the adhesive material of the tape, the semiconductor substrate is divided into a plurality of chips by a dicing, and the adhesive material is drawn from a second surface of the semiconductor substrate opposite to the first surface so that the adhesive material enters into the space. Therefore, dicing remnants remaining in the space during the drawing adhere on the adhesive material, and can be removed together with the adhesive material when the semiconductor substrate is removed from the tape to form divided chips. Accordingly, the quality of the semiconductor device can be improved.

Claims (51)

1. A method of manufacturing a semiconductor device, comprising:

forming a groove portion recessed from a first surface of a semiconductor substrate having a plurality of integrated circuits, along a scribing line;

bonding a tape having an adhesive material to the first surface of the semiconductor substrate so as to form a space between the groove portion and the adhesive material of the tape;

dividing the semiconductor substrate into a plurality of chips by a dicing, wherein the dicing is performed along the scribing line;

drawing the adhesive material from a second surface of the semiconductor substrate, opposite to the first surface, so that the adhesive material enters into the space; and

removing the semiconductor substrate from the tape to form divided chips.

2. The method according to claim 1 , wherein:

the dicing is performed by using a dicing blade; and

in the dicing, a cutting-in depth of the dicing blade is set so that the dicing blade contacts the adhesive material and a tape portion of the tape.

3. The method according to claim 1 , wherein:

the drawing is performed using a drawing device having a drawing wall portion for defining a drawing port; and

in the drawing, the drawing wall portion only contacts an unavailable area outside available chips of the semiconductor substrate.

4. The method according to claim 1 , wherein all the space is filled with the adhesive material during the drawing.

5. The method according to claim 1 , wherein,

in the forming of the groove portion, the groove portion is formed into a trapezoid shape in cross section having a tapered side wall relative to a bottom surface of the groove portion.

6. The method according to claim 1 , wherein,

in the forming of the groove portion, the groove portion is formed into a triangular shape in cross section.

7. The method according to claim 1 , wherein,

in the forming of the groove portion, the groove portion is formed into a round-cornered square shape in cross section.

8. The method according to claim 1 , wherein,

in the forming of the groove portion, the groove portion is formed into a circular arc shape in cross section.

9. The method according to claim 1 , wherein,

in the forming of the groove portion, the groove portion is formed into a rectangular shape in cross section.

10. The method according to claim 1 , wherein,

in the drawing, the tape including the adhesive material enters into the space.

11. The method according to claim 1 , further comprising

heating the adhesive material before the drawing or during the drawing.

12. A method of manufacturing a semiconductor device, comprising:

forming a groove portion recessed from a surface of a semiconductor substrate having a plurality of integrated circuits, along a scribing line;

bonding a tape having an adhesive material to the surface of the semiconductor substrate, having the groove portion, so as to form a space between the groove portion and the adhesive material of the tape;

drawing the adhesive material from a peripheral end of the semiconductor substrate through the space so that the adhesive material enters into the space;

dividing the semiconductor substrate into a plurality of chips by a dicing, wherein the dicing is performed along the scribing line; and

removing the semiconductor substrate from the tape to form divided chips.

13. The method according to claim 12 , wherein,

in the forming of the groove portion, the groove portion is formed into a trapezoid shape in cross section having a tapered side wall relative to a bottom surface of the groove portion.

14. The method according to claim 12 , wherein,

in the forming of the groove portion, the groove portion is formed into a triangular shape in cross section.

15. The method according to claim 12 , wherein,

in the forming of the groove portion, the groove portion is formed into a round-cornered square shape in cross section.

16. The method according to claim 12 , wherein,

in the forming of the groove portion, the groove portion is formed into a circular arc shape in cross section.

17. The method according to claim 12 , wherein,

in the drawing, the tape including the adhesive material enters into the space.

18. The method according to claim 12 , further comprising

heating the adhesive material before the drawing or during the drawing.

19. A method of manufacturing a semiconductor device, comprising:

bonding a tape having an adhesive material to a first surface of a semiconductor substrate having a plurality of integrated circuits;

dividing the semiconductor substrate into a plurality of chips by a dicing so as to form a diced clearance in the semiconductor substrate;

drawing the adhesive material from a second surface of the semiconductor substrate, opposite to the first surface, so that the adhesive material enters into the diced clearance; and

removing the semiconductor substrate from the tape to form divided chips.

20. The method according to claim 19 , further comprising heating the adhesive material before the drawing or during the drawing.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2005
From: NAGASAKA, TAKESHI
To: DENSO CORPORATION
Reel/Frame 016954/0182 →
Priority Claims (1)
JP 2004-268104 · Sep 15, 2004 · national
Continuity (1)
Related Publication 20060054273A1 · Mar 16, 2006