IP Library Granted Patent US 7,538,707
Granted Patent B2
US 7,538,707 · App. 11/861,547 · Granted May 26, 2009

Digital-to-analog converting circuit and digital-to-analog converting method

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 7,538,707
App. No.
11/861,547
Granted
May 26, 2009
Kind
B2
Abstract

A digital-to-analog converting circuit includes: 2N or more number of digital-to-analog converting elements converting an input digital code of N+1 (N is an integer equal to or more than two) values to an analog code to output; a selecting section selecting N-number of digital-to-analog converting elements; and a control section controlling a second selecting so that each of at least N-number of digital-to-analog converting elements used for the digital-to-analog converting does not continuously output the same analog code at a second digital-to-analog converting timing following a first selecting of the N-number of digital-to-analog converting elements by the selecting section at a first digital-to-analog converting timing.

Claims (20)

1. A digital-to-analog converting circuit comprising:

m×N (m is an integer equal to or more than two and N is an integer equal to or more than two) or more number of digital-to-analog converting elements converting an input digital code of N+1 values to an analog code in one of three states of H level, L level, and non-selection to output;

a first selecting section selecting digital-to-analog converting elements that output r (r is an integer equal to or smaller than N) number of H levels for a thermometer digital code expressing the input digital code with the number of H levels and L levels; and

a second selecting section selecting the digital-to-analog converting elements that output N−r number of L levels,

wherein selecting of the digital-to-analog converting element is controlled so that the same digital-to-analog converting element does not continuously output the same analog code as the first and second selecting sections cause the digital-to-analog converting elements selected respectively at the first digital-to-analog converting timing and at the second digital-to-analog converting timing to circulate in an inverse direction to each other.

2. A digital-to-analog converting circuit comprising:

a first digital-to-analog converting element set having 2N (N is an integer equal to or more than two) or more number of digital-to-analog converting elements converting an input digital code of N+1 values to an analog code in one of two states of H level and non-selection to output;

a second digital-to-analog converting element set having 2N or more number of digital-to-analog converting elements converting an input digital code to an analog code in one of two states of L level and non-selection to output;

a first selecting section selecting, from the first digital-to-analog converting element set, digital-to-analog converting elements that output r (r is an integer equal to or smaller than N) number of H levels with respect to a thermometer digital code expressing the input digital code with the number of H levels and L levels; and

a second selecting section selecting, from the second digital-to-analog converting element set, the digital-to-analog converting elements that output N−r number of L levels,

wherein selecting of the digital-to-analog converting element is controlled so that the same digital-to-analog converting element is not continuously selected as the first and second selecting sections cause the digital-to-analog converting elements selected respectively at the first digital-to-analog converting timing and at the second digital-to-analog converting timing to circulate.

3. A digital-to-analog converting circuit comprising:

2N or more number of digital-to-analog converting elements converting an input digital code of N+1 (N is an integer equal to or more than two) values to an analog code to output;

a selecting section selecting N-number of digital-to-analog converting elements; and

a control section controlling a second selecting so that each of the at least N-number of digital-to-analog converting elements used for digital-to-analog converting does not continuously output the same analog code at a second digital-to-analog converting timing following a first selecting by the selecting section of the N-number of digital-to-analog converting elements at a first digital-to-analog converting timing,

wherein the 2N or more number of digital-to-analog converting elements are formed with M (M is an integer equal to or more than three) digital-to-analog converting element sets having N-number of digital-to-analog converting elements respectively.

4. The digital-to-analog converting circuit according to claim 3 ,

wherein the control section selects one set from the M sets at each digital-to-analog converting timing so that such a frequency that a digital code of an H level is inputted and such a frequency that a digital code of an L level is inputted are same at every digital-to-analog converting element in the digital-to-analog converting element sets which have not been used at a previous digital-to-analog converting timing.

5. The digital-to-analog converting circuit according to claim 4 ,

wherein the selecting section selects the N-number of digital-to-analog converting elements in each digital-to-analog converting element set respectively in order to circulate the digital-to-analog converting elements converting the digital code of the H level and the L level in an inverse direction to each other.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2007
From: SAKURAI, SATOSHI; SAITOH, ASAMI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 020271/0454 →
Priority Claims (1)
JP 2006-268816 · Sep 29, 2006 · national
Continuity (1)
Related Publication 20080079619A1 · Apr 3, 2008