IP Library Granted Patent US 7,564,079
Granted Patent B2
US 7,564,079 · App. 11/354,921 · Granted Jul 21, 2009

Solid state imager device with leakage current inhibiting region

Assignee: Sony Corporation
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Quick Facts
Patent No.
US 7,564,079
App. No.
11/354,921
Granted
Jul 21, 2009
Kind
B2
Abstract

In a case when a structure of forming a p+ layer on a substrate rear surface side is employed in order to prevent dark current generation from the silicon boundary surface, various problems occur. According to this invention, an insulation film 39 is provided on a rear surface on a silicon substrate 31 and a transparent electrode 40 is further provided thereon, and by applying a negative voltage with respect to the potential of the silicon substrate 31 from a voltage supply source 41 to the insulation film 39 through the transparent electrode 40 , positive holes are accumulated on a silicon boundary surface of the substrate rear surface side and a structure equivalent to a state in which a positive hole accumulation layer exists on aforesaid silicon boundary surface is to be created. Thus, various problems in the related art can be avoided.

Claims (18)

1. A solid-state imager device, wherein

pixels including photoelectric conversion elements are formed on a semiconductor substrate;

incident light is made to be taken in from a rear surface side of said semiconductor substrate;

an insulation film is formed on said rear surface side;

a rear surface electrode is formed through said insulation film at least in the pixel array portion; and

there is provided under a pad portion of said rear surface electrode with a leakage current inhibiting region for inhibiting a leakage current between the pad portion and said semiconductor substrate,

wherein said rear surface electrode has a two-layer structure separated by an interlayer insulation film;

said two-layer structure is connected by a contact portion; and

said leakage current inhibiting region is formed by said interlayer insulation film under the pad portion of said rear surface electrode.

2. A solid-state imager device according to claim 1 , wherein

said rear surface electrode has a two-layer structure;

an interlayer insulation film is inserted into said two-layer structure corresponding to the pad portion of said rear surface electrode; and

said leakage current inhibiting region is formed by said interlayer insulation film.

3. A solid-state imager device according to claim 1 , wherein

a semiconductor well region of a floating potential or of a potential same as that of said rear surface electrode is formed by being contacted with at least a rear surface of said semiconductor substrate under said pad portion;

said semiconductor well region is surrounded by a semiconductor region of a reverse conductivity type with that of said semiconductor well region which is to have a reverse bias with respect to the potential of said rear surface electrode; and

said leakage current inhibiting region is formed by said semiconductor well region.

4. A solid-state imager device according to claim 1 , wherein a layer on the side closer to the Si substrate in said two-layer structure is formed only in the vicinity of said pixel array portion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2006
From: MABUCHI, KEIJI; KARASAWA, NOBUHIRO
To: SONY CORPORATION
Reel/Frame 017585/0533 →
Priority Claims (2)
JP 2005-043357 · Feb 21, 2005 · national
JP 2005-366916 · Dec 20, 2005 · national
Continuity (1)
Related Publication 20060187327A1 · Aug 24, 2006