TCAM BIST with redundancy
View Patent ↗In an embodiment of the invention, a method of providing redundancy in a ternary content addressable memory (TCAM) includes: detecting a defective entry in a ternary content addressable memory (TCAM); marking the defective entry so that the defective entry is visible to a software; and avoiding in using the defective entry. For data that normally would have been written into the defective entry, the data is written into an entry that is subsequent to the defective entry. In another embodiment, the redundancy is provided in a CAM instead of a TCAM.
1. A method of providing redundancy in a ternary content addressable memory (TCAM), the method comprising:
detecting a defective entry in building block in a ternary content addressable memory (TCAM);
writing an address of the defective entry into a storage area; and
setting a bit associated with the address in order to indicate that the entry is defective.
2. The method of claim 1 , wherein the building block is formed by an array of TCAM cells.
3. The method of claim 1 , wherein the defective entry is detected by use of a built-in self test (BIST) sequence.
4. The method of claim 1 , further comprising:
a software reading the storage area in order to determine the defective entry; and
the software builds a remapping table that redirects a query that is directed to the defective entry.
5. The method of claim 4 , further comprising: the software reading the remapping table and redirecting queries such that the defective entry is not used.
6. The method of claim 4 , wherein the remapping table is embedded in hardware.
7. The method of claim 1 , wherein the TCAM prevents a software from writing into the defective entry.
8. The method of claim 1 , further comprising: for data that normally would have been written into the defective entry, writing the data into a next available non-defective entry.
9. The method of claim 1 , wherein more than one defective entry is detected and a software is prevented from using any defective entry.
10. An apparatus for providing redundancy in a ternary content addressable memory (TCAM), the apparatus comprising:
a ternary content addressable memory (TCAM) comprising at least one building block and at least one storage area,, wherein an address of a defective entry is written into said storage area and a bit associated with the address is set in order to indicate that the entry is defective; and
a remapping table configures to redirect a query that is directed to the defective entry to another entry.
11. The apparatus of claim 10 , wherein the building block is formed by an array of TCAM cells.
12. The apparatus of claim 10 , wherein the defective entry is detected by use of a built-in self test (BIST) sequence.
13. The apparatus of claim 10 further comprising a software, wherein the software reads the remapping table to determine where the query should be directed.
14. The apparatus of claim 10 , further comprising a hardware that remaps at least some of the entries in the TCAM so that the defective entry is not used.
15. The apparatus of claim 10 , wherein a software is prevented from writing into the defective entry.
16. The apparatus of claim 10 , wherein for data that normally would have been written into the defective entry, the data is written into an entry that is subsequent to the defective entry.
17. A ternary content addressable memory (TCAM) device comprising:
at least one building block;
at least one storage area, wherein an address of a defective entry detected in said at least one building block is written into said at least one storage area; and
a bit associated with said address, wherein said bit is set in order to indicate that the entry is defective.