Data communication device
View Patent ↗A data communication device comprises an input circuit (DRTC) that converts external data (XDT) into internal data (IDT) on the basis of a sampling signal (SP). A synchronization circuit (SYNC) provides the sampling signal (SP) on the basis of an oscillator signal (OS) and a synchronization value (SV). The synchronization value (SV) is representative of a number of cycles of the oscillator signal (OS) contained within a time interval for a unit of external data. The synchronization value (SV) is an initial value (IV) during an initial synchronization phase and a measured value (MV) during a measurement-based synchronization phase. A control circuit (IFC) carries out a calibration step in which the initial value (IV) is a preprogrammed reset value (RV) and in which the measured value (MV) is stored as a calibration value (CV). The control circuit (IFC) applies the calibration value (CV) as the initial value (IV) in subsequent initial synchronization phases.
1. A data communication device comprising:
an input circuit arranged to convert external data into internal data on the basis of a sampling signal;
a synchronization circuit arranged to provide the sampling signal on the basis of an oscillator signal and a synchronization value that is representative of a number of cycles of the oscillator signal contained within a time interval for a unit of external data, the synchronization value being an initial value during an initial synchronization phase and a measured value during a measurement-based synchronization phase; and
a control circuit arranged to carry out a calibration step in which the initial value is a preprogrammed reset value and in which the measured value is stored as a calibration value, the control circuit being arranged to apply the calibration value as the initial value for subsequent initial synchronization phases.
2. The data communication device as claimed in claim 1 , wherein the input circuit is arranged to receive and transmit a bit-serial stream in accordance with a universal serial bus standard.
3. The data communication device as claimed in claim 1 , wherein an oscillator circuit is arranged to provide a set of multiphase oscillator signals and wherein the synchronization circuit is arranged to select an oscillator signal therefrom on the basis of a fractional part in the measured value.
4. A method of manufacturing a data communication device as claimed in claim 1 , the method comprising a finishing step in which the data communication device is caused to carry out the calibration step while applying external data to the data communication device.
5. A data processing system comprising a computer and a data communication device as claimed in claim 1 , which is connectable to the computer.
6. A data processing system comprising a computer and a data communication device as claimed in claim 2 , which is connectable to the computer, the computer being arranged to receive data from the data communication device and to transmit data to the communication device in accordance with the universal serial bus standard.
7. A method of data communication that employs a data communication device comprising:
an input circuit arranged to convert external data into internal data on the basis of a sampling signal; and
a synchronization circuit arranged to provide the sampling signal on the basis of an oscillator signal and a synchronization value that is representative of a number of cycles of the oscillator signal contained within a time interval for a unit of data in the received external signal;
the method comprising:
an initial synchronization step during which an initial value constitutes the synchronization value and during which a measured value is established on the basis of a count of cycles of the oscillator signal within a time interval for N units of data, N being an integer;
a measurement-based synchronization step during which the measured value constitutes the synchronization value; and
a calibration step in which the initial value is a preprogrammed reset value and in which the measured value is stored as a calibration value, the calibration value being applied as the initial value for subsequent initial synchronization steps.
8. A device comprising:
a processor;
a memory comprising software instructions for causing the processor to perform:
an initial synchronization step during which an initial value constitutes a synchronization value and during which a measured value is established on a basis of a count of cycles of an oscillator signal within a time interval for N units of data, N being an integer;
a measured synchronization step during which a measured value constitutes a synchronization value; and
a calibration step in which the initial value is a preprogrammed reset value and in which the measured value is stored as a calibration value, the calibration value being applied as the initial value for subsequent initial synchronization steps.