IP Library Granted Patent US 7,702,293
Granted Patent B2
US 7,702,293 · App. 10/005,766 · Granted Apr 20, 2010

Multi-mode I/O circuitry supporting low interference signaling schemes for high speed digital interfaces

Assignee: Nokia Corporation
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Quick Facts
Patent No.
US 7,702,293
App. No.
10/005,766
Granted
Apr 20, 2010
Kind
B2
Abstract

A multi-mode I/O circuit or cell ( 10 ) is provided for transmitting and receiving data between ICs, where each IC contains at least one of the I/O circuits. Each data link includes transmitter circuitry ( 12 ) and receiver circuitry ( 14 ). The transmitter circuitry sends data to a receiver circuitry in another IC, and the receiver circuitry receives data from a transmitter circuitry in another IC. The I/O circuit is constructed with CMOS-based transistors (e.g., CMOS or BiCMOS) that are selectively interconnected together by a plurality of switches to operate as two single-ended, current or voltage mode links, or as a single differential current or voltage mode link. In the preferred embodiment the transmitter circuitry sends data to the receiver circuitry in another IC over a first pair of adjacently disposed conductors, and the receiver circuitry receives data from the transmitter circuitry in another IC over a second pair of adjacently disposed conductors. The transmitter circuitry and the receiver circuitry are selectively configured by the plurality of switches for operating in a double single-ended voltage mode link mode, a double single-ended current mode link mode, a mode defined by a single differential voltage mode link with a single-ended input drive, a mode defined by a single differential voltage mode link with a differential input drive, a mode defined by a single differential current mode link with a single-ended input drive mode, and a mode defined by a single differential current mode link with a differential input drive. A common I/O circuit may also be provided, and programmed into either the transmitter or the receiver circuit configuration.

Claims (43)

1. A multi-mode input/output (I/O) circuit, comprising at least one of transmitter circuitry or receiver circuitry, said transmitter circuitry configured to send data to another integrated circuit, and said receiver circuitry configured to receive data from another integrated circuit, said input/output circuit being constructed with complementary metal-oxide-semiconductor based transistors that are selectively interconnected together by switches to operate as two single-ended, current or voltage mode links, and as a single differential current or voltage mode link.

2. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry is configured to send data to receiver circuitry in another integrated circuit over a first conductor of a pair of adjacently disposed conductors, and where said receiver circuitry is configured to receive data from transmitter circuitry in another integrated circuit over a second conductor of the pair of adjacently disposed conductors.

3. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating under a condition where a power supply voltage of said transmitter circuitry is equal to a power supply voltage of receiver circuitry in another integrated circuit, for operating under a condition where the power supply voltage of said transmitter circuitry is less than the power supply voltage of receiver circuitry in another integrated circuit, and for operating under a condition where the power supply voltage of said transmitter circuitry is greater than the power supply voltage of receiver circuitry in another integrated circuit.

4. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in one of a plurality of double single-ended, complementary metal-oxide-semiconductor voltage level link modes, wherein in a first mode a power supply voltage of said transmitter circuitry is equal to a power supply voltage of receiver circuitry in another integrated circuit, wherein in a second mode the power supply voltage of said transmitter circuitry is less than the power supply voltage of receiver circuitry in another integrated circuit, and wherein in a third mode the power supply voltage of said transmitter circuitry is greater than the power supply voltage of receiver circuitry in another integrated circuit.

5. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in one of said plurality of double single-ended, complementary metal-oxide-semiconductor voltage level link modes, or in said differential voltage or current mode links, and wherein the ICs at each end of the link may operate with different supply voltages.

6. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a double single-ended voltage mode link mode.

7. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a double single-ended current mode link mode.

8. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a mode defined by a single differential voltage mode link with a single-ended input drive.

9. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a mode defined by a single differential voltage mode link with a differential input drive.

10. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a mode defined by a single differential current mode link with a single-ended input drive mode.

11. The multi-mode input/output circuit as in claim 1 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a mode defined by single differential current mode link with a differential input drive.

12. The multi-mode input/output circuit as in claim 1 , wherein certain switches are provided to convert said input/output circuitry into either said transmitter circuitry configuration or into said receiver circuitry configuration.

13. The multi-mode input/output circuit according to claim 1 , where in the single differential current mode a current drawn from said at least one of transmitter circuitry or receiver circuitry is constant.

14. A method comprising:

providing at least two integrated circuits to each contain at least one input/output circuit, said input/output circuit comprising at least one of transmitter circuitry or receiver circuitry, the transmitter circuitry configured to send data to another integrated circuit, and the receiver circuitry configured to receive data from integrated circuit, the input/output circuit being constructed with complementary metal-oxide-semiconductor based transistors; and

selectively interconnecting together the complementary metal-oxide-semiconductor based transistors with switches to operate as two single-ended, current or voltage mode links, and as a single differential current or voltage mode link.

15. The method as in claim 14 , wherein said transmitter circuitry sends data to receiver circuitry in another integrated circuit over a first conductor of a pair of adjacently disposed conductors, and where said receiver circuitry receives data from transmitter circuitry in said another integrated circuit over a second conductor of the pair of adjacently disposed conductors.

16. The method as in claim 14 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating under a condition where a power supply voltage of said transmitter circuitry is equal to a power supply voltage of receiver circuitry in another integrated circuit, for operating under a condition where the power supply voltage of said transmitter circuitry is less than the power supply voltage of receiver circuitry in another integrated circuit, and for operating under a condition where the power supply voltage of said transmitter circuitry is greater than the power supply voltage of receiver circuitry in another integrated circuit.

17. The method as in claim 14 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in one of a plurality of double single-ended, complementary metal-oxide-semiconductor voltage level link modes, wherein in a first mode a power supply voltage of said transmitter circuitry is equal to a power supply voltage of said receiver circuitry in another integrated circuit, wherein in a second mode the power supply voltage of said transmitter circuitry is less than the power supply voltage of receiver circuitry in another integrated circuit, and wherein in a third mode the power supply voltage of said transmitter circuitry is greater than the power supply voltage of receiver circuitry in another integrated circuit.

18. The method as in claim 14 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing the switches for operating in a double single-ended voltage mode link mode.

19. The method as in claim 14 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing the switches for operating in a double single-ended current mode link mode.

20. The method as in claim 14 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing the switches for operating in a mode defined by a single differential voltage mode link with a single-ended input drive.

21. The method as in claim 14 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing the switches for operating in a mode defined by a single differential voltage mode link with a differential input drive.

22. The method as in claim 14 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing the switches for operating in a mode defined by a single differential current mode link with a single-ended input drive mode.

23. The method as in claim 14 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing the switches for operating in a mode defined by single differential current mode link with a differential input drive.

24. The method as in claim 14 , wherein said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing said switches for operating in one of said plurality of double single-ended, complementary metal-oxide-semiconductor voltage level link modes, or in said differential voltage or current mode links, and wherein the integrated circuits at each end of the link may operate with different supply voltages.

25. The method as in claim 14 , wherein certain switches are provided to convert said input/output circuitry into either said transmitter circuitry configuration or into said receiver circuitry configuration.

26. The method as in claim 14 , where in the single differential current mode a current drawn from said at least one of transmitter circuitry or receiver circuitry is constant.

27. An apparatus comprising:

a plurality of integrated circuits and at least one multi-mode Input/Output circuit configured to cause the apparatus at least to send and receive data between at least two integrated circuits, where each of the at least two integrated circuits contains at least one of said input/output circuits, comprising at least one of transmitter circuitry or receiver circuitry, said transmitter circuitry configured to send data to another integrated circuit, and said receiver circuitry configured to receive data from another integrated circuit, said input/output circuit being constructed with complementary metal-oxide-semiconductor based transistors that are selectively interconnected together by switches to operate as two single-ended, current or voltage mode links, and as a single differential current or voltage mode link.

28. The apparatus as in claim 27 , where said transmitter circuitry sends data to receiver circuitry in another integrated circuit over a first conductor of a pair of adjacently disposed conductors, and where said receiver circuitry receives data from transmitter circuitry in said another integrated circuit over a second conductor of the pair of adjacently disposed conductors.

29. The apparatus as in claim 27 , where said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating under a condition where a power supply voltage of said transmitter circuitry is equal to a power supply voltage of receiver circuitry in another integrated circuit, for operating under a condition where the power supply voltage of said transmitter circuitry is less than the power supply voltage of receiver circuitry in another integrated circuit, and for operating under a condition where the power supply voltage of said transmitter circuitry is greater than the power supply voltage of receiver circuitry in another integrated circuit.

30. The apparatus as in claim 27 , where said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in one of a plurality of double single-ended, complementary metal-oxide-semiconductor voltage level link modes, wherein in a first mode a power supply voltage of said transmitter circuitry is equal to a power supply voltage of receiver circuitry in another integrated circuit, wherein in a second mode the power supply voltage of said transmitter circuitry is less than the power supply voltage of receiver circuitry in another integrated circuit, and wherein in a third mode the power supply voltage of said transmitter circuitry is greater than the power supply voltage of receiver circuitry in another integrated circuit.

31. The apparatus as in claim 27 , where said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in one of said plurality of double single-ended, complementary metal-oxide-semiconductor voltage level link modes, or in said differential voltage or current mode links, and wherein the integrated circuits at each end of the link may operate with different supply voltages.

32. The apparatus as in claim 27 , where said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a double single-ended voltage mode link mode.

33. The apparatus as in claim 27 , where said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a double single-ended current mode link mode.

34. The apparatus as in claim 27 , where said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a mode defined by a single differential voltage mode link with a single-ended input drive.

35. The apparatus as in claim 27 , where said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a mode defined by a single differential voltage mode link with a differential input drive.

36. The apparatus as in claim 27 , where said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a mode defined by a single differential current mode link with a single-ended input drive mode.

37. The apparatus as in claim 27 , where said transmitter circuitry and said receiver circuitry are selectively configured by opening or closing switches for operating in a mode defined by single differential current mode link with a differential input drive.

38. The apparatus as in claim 27 , where certain switches are provided to convert said input/output circuitry into either said transmitter circuitry configuration or into said receiver circuitry configuration.

39. The apparatus as in claim 27 , where at least one of said plurality of integrated circuits comprises a radio frequency integrated circuit, and where at least one other one of said integrated circuits comprises a baseband integrated circuit.

40. The apparatus as in claim 27 , where in the single differential current mode a current drawn from said at least one of transmitter circuitry or receiver circuitry is constant.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2021
From: PROVENANCE ASSET GROUP LLC
To: RPX CORPORATION
Reel/Frame 059352/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 30, 2021
From: CORTLAND CAPITAL MARKETS SERVICES LLC
To: PROVENANCE ASSET GROUP HOLDINGS LLC; PROVENANCE ASSET GROUP LLC
Reel/Frame 058983/0104 →
RELEASE OF SECURITY INTEREST Recorded Nov 30, 2021
From: NOKIA US HOLDINGS INC.
To: PROVENANCE ASSET GROUP HOLDINGS LLC; PROVENANCE ASSET GROUP LLC
Reel/Frame 058363/0723 →
ASSIGNMENT AND ASSUMPTION AGREEMENT Recorded Feb 14, 2019
From: NOKIA USA INC.
To: NOKIA US HOLDINGS INC.
Reel/Frame 048370/0682 →
SECURITY INTEREST Recorded Sep 13, 2017
From: PROVENANCE ASSET GROUP HOLDINGS, LLC; PROVENANCE ASSET GROUP, LLC
To: CORTLAND CAPITAL MARKET SERVICES, LLC
Reel/Frame 043967/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2017
From: NOKIA TECHNOLOGIES OY; NOKIA SOLUTIONS AND NETWORKS BV; ALCATEL LUCENT SAS
To: PROVENANCE ASSET GROUP LLC
Reel/Frame 043877/0001 →
SECURITY INTEREST Recorded Sep 13, 2017
From: PROVENANCE ASSET GROUP HOLDINGS, LLC; PROVENANCE ASSET GROUP LLC
To: NOKIA USA INC.
Reel/Frame 043879/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2015
From: NOKIA CORPORATION
To: NOKIA TECHNOLOGIES OY
Reel/Frame 035551/0535 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2001
From: RUHA, ANTTI; RUOTSALAINEN, TARMO; TERVALUOTO, JUSSI-PEKKA
To: NOKIA CORPORATION
Reel/Frame 012358/0839 →
Continuity (1)
Related Publication 20030087671A1 · May 8, 2003