IP Library Granted Patent US 7,719,086
Granted Patent B2
US 7,719,086 · App. 11/943,614 · Granted May 18, 2010

Lateral insulated gate bipolar transistor having a retrograde doping profile in base region and method of manufacture thereof

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Quick Facts
Patent No.
US 7,719,086
App. No.
11/943,614
Granted
May 18, 2010
Kind
B2
Abstract

In a semiconductor device of the present invention, a first base region 16 is extended to a part under a gate electrode 7 while having a vertical concentration profile of an impurity that increases from the surface of a semiconductor layer 3 and becomes maximum under an emitter region 5, and the length in the lateral direction from a point where the impurity concentration becomes maximum located under an end of the gate electrode 7 to the boundary with a second base region 15 is not smaller than the length in the vertical direction from the point where the impurity concentration becomes maximum to the boundary with the second base region 15.

Claims (15)

1. A semiconductor device comprising:

a supporting substrate;

a semiconductor layer of a first conductivity type formed in a main surface of said supporting substrate via a buried insulating film;

a first base region of a second conductivity type formed in a surface of said semiconductor layer;

a buffer region of the first conductivity type formed in the surface of said semiconductor layer apart from said first base region in the lateral direction;

an emitter region of the first conductivity type formed in the surface of said first base region;

a collector region of the second conductivity type formed in the surface of said buffer region;

a base contact diffusion region of the second conductivity type formed in the surface of said first base region;

a gate insulating film formed on said semiconductor layer;

a gate electrode formed on said gate insulating film;

an emitter electrode connected to said emitter region and said base contact diffusion region; and

a collector electrode connected to said collector region; wherein

a length in a lateral direction from a point where an impurity concentration of the second conductivity type in said first base region becomes maximum under said emitter region and at an end of said gate electrode, to a boundary between said first base region and in said semiconductor layer is not smaller than a length in the vertical direction from said point to the underside of said first base region; and

according to a plan view of said collector region, said collector region having a corner portion and a straight portion and is surrounded by said gate electrode, and said emitter region is located at the periphery of said collector region and is formed corresponding to said straight portion wherein a second base region of the second conductivity type includes at least a part of said first base region, and a concentration of the second conductivity type in said second base region is lower than a concentration of the second conductivity type at the surface of said first base region.

2. The semiconductor device according to claim 1 , wherein said base contact diffusion region of the second conductivity type extends under said emitter region.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2008
From: IKUTA, TERUHISA; SATO, YOSHINOBU
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 020705/0616 →