Apparatus of memory array using FinFETs
View Patent ↗A memory cell includes a FinFET select device and a memory element. In some embodiments a memory cell has a contact element coupled between a surface of the fin and the memory element.
1. A memory device, comprising:
a FinFET select device having a fin; and
a memory element, wherein the FinFET select device has a contact element coupled between a surface of the fin and the memory element, and wherein the contact element of the FinFET select device directly contacts the memory element.
2. The memory device of claim 1 , wherein the contact element partially wraps around the fin.
3. The memory device of claim 1 , wherein the contact element is an embedded memory element.
4. The memory device of claim 1 , wherein the memory element is a NVM.
5. The memory device of claim 4 , wherein the memory element is selected from a group of memory elements consisting of PCRAM, MRAM, CBRAM, and FeRAM.
6. A memory cell array of memory cells, at least one of the memory cells comprising:
an NVM memory element; and
a finFET electrically coupled to one of the memory element via a contact element, wherein the contact element directly contacts the memory element, and wherein the area of said memory cell is less than 0.022 μm 2 .
7. The memory cell array of claim 6 , wherein the area of said memory cell is less than 0.020 um 2 .
8. The memory cell array of claim 6 , wherein said memory element is a PCRAM memory element.
9. The memory cell array of claim 6 , wherein said PCRAM memory element comprises a chalcogenide memory material.
10. The memory cell array of claim 6 , wherein said memory cell is constructed in accordance with an architecture of no more than 32 nm.
11. A memory cell, comprising:
an NVM memory element;
a finFET electrically coupled to said memory element, wherein the cell size of said memory cell is less than 9A 2 , where A is one-half the fin pitch of said memory cell, wherein a contact element is coupled between a surface of a fin and the NVM memory element, and wherein the contact element directly contacts the NVM memory element.
12. The memory cell of claim 11 , wherein the cell size is less than 8A 2 .
13. The memory cell of claim 11 , wherein said NVM memory clement is a PCRAM memory element.
14. The memory cell of claim 13 , wherein said PCRAM memory element comprises a chalcogenide material.
15. A memory cell, comprising:
an NVM memory element;
a finFET electrically coupled to said memory element, wherein the cell size of said memory cell is less than 22B 2 , where B is the printed gate length of said finFET, wherein a contact element is coupled between a surface of a fin and the NVM memory element, and wherein the contact element directly contacts the NVM memory element.
16. The memory cell of claim 15 , wherein the cell size is less than 20B 2 .
17. The memory cell of claim 15 , wherein the cell size is less than 18B 2 .
18. The memory cell of claim 15 , wherein said NVM memory element is a PCRAM memory element.
19. The memory cell of claim 15 , wherein said PCRAM memory element comprises a chalcogenide material.
20. A memory device, comprising:
a FinFET select device having a fin; and
a memory element, wherein the FinFET select device has a contact element directly contacting both a surface of the fin and the memory element, and wherein the contact element partially wraps around the fin.