Thin film transistor substrate, electronic apparatus, and methods for fabricating the same
A TFT substrate includes a substrate and at least a TFT disposed thereon. The TFT includes a semiconductor island and at least a gate. The semiconductor island has a source region, a drain region, and a channel region interposed therebetween. The semiconductor island has sub-grain boundaries. The gate corresponds to the channel region. A first included angle between an extending direction of the gate and a line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 90 degrees. A second included angle between the sub-grain boundaries in the channel region and the line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 0 degree or 90 degrees. Additionally, a method of fabricating a TFT substrate, an electronic apparatus, and a method of fabricating the electronic apparatus are also provided.
1. A thin film transistor substrate, comprising:
a substrate;
at least a thin film transistor, disposed on the substrate and comprising:
a semiconductor island, comprising a source region, a drain region, and a channel region disposed between the source region and the drain region, the semiconductor island further comprising a plurality of sub-grain boundaries; and
at least a gate, corresponding to the channel region, wherein a first included angle between an extending direction of the gate and a line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 90 degrees, and a second included angle between the sub-grain boundaries and the line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 0 degree or 90 degrees.
2. The thin film transistor substrate of claim 1 , wherein the first included angle substantially ranges from 10 degrees to 80 degrees.
3. The thin film transistor substrate of claim 1 , wherein the second included angle substantially ranges from 10 degrees to 80 degrees.
4. The thin film transistor substrate of claim 1 , wherein the gate located between the source region and the drain region has a bar shape, and the extending direction of the gate is a length direction of the gate.
5. The thin film transistor substrate of claim 1 , wherein the sub-grain boundaries in the channel region are substantially parallel to a width direction of the gate.
6. The thin film transistor substrate of claim 1 , wherein the sub-grain boundaries in the channel region are substantially parallel to a length direction of the gate.
7. A method for fabricating a thin film transistor substrate, the method comprising:
providing a substrate;
forming at least a semiconductor island on the substrate, the at least a semiconductor island comprising a plurality of sub-grain boundaries;
defining a source region, a drain region, and a channel region disposed between the source region and the drain region in the semiconductor island;
forming at least a gate corresponding to the channel region, so as to obtain a first included angle and a second included angle, wherein the first included angle between an extending direction of the gate and a line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 90 degrees, and the second included angle between the sub-grain boundaries in the channel region and the extending direction of the gate is not substantially equal to 0 degree or 90 degrees.
8. An electronic apparatus comprising a display panel and an electronic component connected to the display panel, wherein the display panel comprises the thin film transistor substrate of claim 1 .
9. A method for fabricating an electronic apparatus, the method comprising providing a display panel and an electronic component connected to the display panel, wherein a method for fabricating the display panel comprises a method for fabricating the thin film transistor substrate of claim 1 .