IP Library Granted Patent US 7,932,885
Granted Patent B2
US 7,932,885 · App. 11/057,852 · Granted Apr 26, 2011

Electro-optical device and electronic apparatus with dummy data lines operated substantially simultaneously

Assignee: Seiko Epson Corporation
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Quick Facts
Patent No.
US 7,932,885
App. No.
11/057,852
Granted
Apr 26, 2011
Kind
B2
Abstract

Signals are respectively output from a first stage and a last stage in a shift register to which a plurality of latch circuits are connected to each other. Based on the signals, data lines are selected. A dummy pixel region comprising pixels corresponding to the selected data lines and data lines adjacent to the selected data lines becomes a non-display region. Therefore, degradation of image quality is suppressed.

Claims (31)

1. An electro-optical device comprising:

scanning lines;

data lines intersecting the scanning lines, the data lines being divided into a plurality of data line groups including a first data line group with a plurality of dummy data lines only, a second data line group with a plurality of display data lines and with a plurality of dummy data lines, one of the plurality of dummy data lines of the second data line group being arranged adjacent to one of the plurality of dummy data lines of the first data line group,

pixels corresponding to intersections of the scanning lines and the data lines, the pixels including display pixels that correspond to the display data lines of the second data line group, and dummy pixels that correspond to the dummy data lines of the first data line group and the second data line group;

a scanning line driving circuit for selecting one of the scanning lines every horizontal scanning period to sequentially select the scanning lines;

a shift register composed of a plurality of stages that are electrically connected to each other and that sequentially transmit a start pulse signal supplied at a beginning of each of the horizontal scanning periods, the shift register including a first stage corresponding to the plurality of dummy data lines of the first data line group and a second stage corresponding to the plurality of display data lines and the plurality of dummy data lines of the second data line group;

image signal lines for supplying signals;

a plurality of sampling switches electrically connected between the data lines and the image signal lines, the sampling switches including a first sampling switch group that corresponds to the first data line group and a second sampling switch group that corresponds to the second data line group, wherein sampling switches of the first sampling switch group are, based on the pulse signal transmitted at the first stage of the shift register, operated at substantially a same time to sample the signals supplied through the image signal lines and to substantially simultaneously transmit the sampled signals to the dummy data lines of the first data line group, and wherein sampling switches of the second sampling switch group are, based on the pulse signal transmitted at the second stage of the shift register, operated at substantially a same time to sample the signals supplied through the image signal lines and to substantially simultaneously transmit the sampled signals to the display data lines and to the dummy data lines of the second data line group;

a first operation circuit for implementing logical operation between a first enable signal and a first start pulse signal transmitted directly and only from the first stage of the shift register; and

a second operation circuit for implementing logical operation between a second enable signal and a second start pulse signal transmitted directly and only from the second stage of the shift register,

wherein output pulse widths of the first and second operation circuit do not overlap each other.

2. The electro-optical device according to claim 1 , wherein a number of data lines is a multiple number of the number of the sampling switches turned on and off substantially at a same time based on the pulse signal transmitted at a corresponding stage of the shift register.

3. The electro-optical device according to claim 1 , further comprising:

an operation circuit for calculating logical operation signals of a predetermined enable signal and the start pulse signals transmitted from each stage of the shift register such that pulse widths thereof do not overlap each other,

wherein the sampling switches corresponding to a same group turn on and off according to a same logical operation signal.

4. The electro-optical device according to claim 3 ,

wherein each image signal is extended along a time axis according to a number of image signal lines by synchronizing signals designating gray-scale levels of the pixels with the supply of the enable signal, and

wherein each image signal is distributed to the image signal line so as to be supplied to the data line turned on by the sampling switch.

5. The electro-optical device according to claim 1 , wherein a number of data lines in an effective pixel region is a multiple number of the number of the sampling switches turned on and off substantially at a same time based on the pulse signal transmitted at a corresponding stage of the shift register.

6. The electro-optical device according to claim 1 , further comprising:

a third data line group with a polarity of display data lines only, wherein dummy pixel regions are symmetrically located with respect to a center of the third data line group for performing display.

7. An electro-optical device comprising:

scanning lines;

data lines intersecting the scanning lines, the data lines including a first data line group with a plurality of dummy data lines only, a second data line group with a plurality of display data lines and with a plurality of dummy data lines, one of the plurality of dummy data lines of the second data line group being arranged adjacent to one of the plurality of dummy data lines of the first data line group;

pixels corresponding to intersections of the scanning lines and the data lines, the pixels including display pixels that correspond to the display data lines of the second data line group, and dummy pixels that correspond to the dummy data lines of the first data line group and the second data line group, the dummy pixels corresponding to the dummy data lines;

a shift register comprising a plurality of stages that are electrically connected to each other, the shift register including a first stage in one transmission direction electrically connected to the plurality of dummy data lines of the first data line group and a second stage in one transmission direction electrically connected to the plurality of display data lines and the plurality of dummy data lines of the second data line group;

image signal lines;

sampling switches electrically connected between the data lines and the image signal lines, each of the sampling switches corresponding to one of the data lines;

a first operation circuit for implementing logical operation between a first enable signal and a first start pulse signal transmitted directly and only from the first stage of the shift register; and

a second operation circuit for implementing logical operation between a second enable signal and a second start pulse signal transmitted directly and only from the second stage of the shift register,

wherein output pulse widths of the first and second operation circuit do not overlap each other.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2019
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 050197/0212 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2005
From: MURADE, MASAO
To: SEIKO EPSON CORPORATION
Reel/Frame 016282/0748 →
Priority Claims (1)
JP 2004-081518 · Mar 19, 2004 · national
Continuity (1)
Related Publication 20050206969A1 · Sep 22, 2005