IP Library Granted Patent US 7,940,940
Granted Patent B2
US 7,940,940 · App. 11/481,158 · Granted May 10, 2011

Muting circuit and semiconductor integrated circuit

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 7,940,940
App. No.
11/481,158
Granted
May 10, 2011
Kind
B2
Abstract

A muting circuit of the present invention includes: an input terminal that receives a control signal for allowing switching between ON and OFF of a mute operation; and a muting transistor connected to the input terminal and an output terminal of the amplifier. The muting transistor is a MOS transistor, and a gate is connected to the input terminal, a drain is connected to the output terminal of the amplifier, and a source is grounded. Consequently, a shot noise due to a DC difference caused when a mute state is switched between ON and OFF can be suppressed.

Claims (10)

1. A muting circuit configured to temporarily mute an audio signal amplified by an amplifier, comprising:

an input terminal that receives a control signal for allowing switching between ON and OFF of a mute operation;

a muting transistor connected to the input terminal and an output terminal of the amplifier;

a first resistor and a second resistor directly connected next to each other in series between a reference power source terminal and a ground terminal;

a capacitor directly connected to a connection portion between the first resistor and the second resistor;

a first transistor whose gate is connected to the connection portion; and

a second transistor whose source is connected to the connection portion, whose gate is connected to the drain of the first transistor, and whose drain is connected to the gate of the muting transistor;

wherein the muting transistor is a MOS transistor, and

a gate is connected to the input terminal, a drain is connected to the output terminal of the amplifier, and a source is grounded.

2. The muting circuit according to claim 1 , further comprising a resistor connected between a back gate of the muting transistor and the output terminal of the amplifier.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2014
From: PANASONIC CORPORATION (FORMERLY MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.)
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 032152/0514 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0534 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2007
From: KAKUMOTO, YASUNOBU; FUJII, KEIICHI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 019002/0509 →
Priority Claims (1)
JP 2005-200161 · Jul 8, 2005 · national
Continuity (1)
Related Publication 20070009110A1 · Jan 11, 2007