Arithmetic decoding apparatus
Disclosed herein is an arithmetic decoding apparatus including an instruction decoder configured to decode an arithmetically encoded data decoding instruction to be executed for carrying out an arithmetic-decoding process of arithmetically decoding arithmetically encoded data into a binary signal; an execution condition code holding section configured to hold the binary signal obtained as a result of an immediately preceding arithmetic-decoding process as an execution condition code; and an arithmetic decoding execution section configured to determine whether a context number specified by the arithmetically encoded data decoding instruction is to be used as a context index as it is or the specified context number incremented by 1 is to be used as the context index in accordance with the execution condition code, and carry out the arithmetic decoding process by making use of the determined context index.
1. An arithmetic decoding apparatus comprising:
an instruction decoder configured to decode an arithmetically encoded data decoding instruction to be executed for carrying out an arithmetic-decoding process of arithmetically decoding arithmetically encoded data into a binary signal;
an execution condition code holding section configured to hold said binary signal obtained as a result of an immediately preceding arithmetic-decoding process as an execution condition code; and
an arithmetic decoding execution section configured to
determine whether a context number specified by said arithmetically encoded data decoding instruction is to be used as a context index as it is or said specified context number incremented by 1 is to be used as said context index in accordance with said execution condition code, and
carry out said arithmetic decoding process by making use of said determined context index.
2. The arithmetic decoding apparatus according to claim 1 wherein
said arithmetic decoding execution section determines whether or not said arithmetic-decoding process is to be carried out on the basis of said execution condition code.
3. The arithmetic decoding apparatus according to claim 1 wherein said context number is specified in said arithmetically encoded data decoding instruction as an immediate value to be added to the contents of a register indicated by an input operand also specified in said arithmetic-encoded data decoding instruction.
4. An arithmetic decoding apparatus comprising:
an instruction decoder configured to decode
an arithmetically encoded data decoding instruction for carrying out an arithmetic-decoding process of arithmetically decoding arithmetically encoded data into a binary signal,
a matching instruction having a bit map, which represents a matching condition of said arithmetic-decoding process, as an input operand, and
a branch instruction for making an instruction jump in accordance with a branch condition code;
an arithmetic-decoding execution section configured to carry out said arithmetic-decoding process by making use of a context number specified by said arithmetically encoded data decoding instruction;
a history holding section configured to be used to store a history of said binary signals each obtained as a result of said arithmetic-decoding process;
a matching process section configured to set said branch condition code in accordance with whether or not said history of said binary signal matches said matching condition; and
an instruction control section configured to make said instruction jump in accordance with said branch condition code.
5. The arithmetic decoding apparatus according to claim 4 wherein, if an input operand of said arithmetically encoded data decoding instruction specifies an operation to clear said history held by said history holding section, said arithmetic-decoding execution section clears said history.