Semiconductor device and manufacturing method thereof
A recess along a sidewall is formed in a pMOS region and an nMOS region. An SiC layer of which thickness is thicker than a depth of the recess is formed in the recess. A sidewall covering a part of the SiC layer is formed at both lateral sides of a gate electrode in the pMOS region. A recess is formed by selectively removing the SiC layer in the pMOS region. A side surface of the recess at the gate insulating film side is inclined so that the upper region of the side surface, the closer to the gate insulating film in a lateral direction at a region lower than the surface of the silicon substrate. An SiGe layer is formed in the recess in the pMOS region.
1. A manufacturing method of a semiconductor device, comprising:
forming an n-well in a silicon substrate;
forming a gate insulating film on the silicon substrate;
forming a gate electrode on the gate insulating film;
forming a first sidewall insulating film at both lateral sides of the gate electrode;
forming a first recess in the silicon substrate using the first sidewall insulating film;
forming an SiC layer of which thickness is thicker than a depth of the first recess in the first recess;
forming a second sidewall insulating film covering a part of the SiC layer at both lateral sides of the gate electrode;
selectively removing the SiC layer so as to form a second recess, a side surface of the second recess at the gate insulating film side being inclined; and
forming an SiGe layer in the second recess.
2. The manufacturing method of a semiconductor device according to claim 1 , wherein the forming a second recess comprises:
removing a first portion of the SiC layer, the first portion exposing from the second sidewall; and
selectively removing a second portion of the SiC layer, the second portion being under the second sidewall insulating film.
3. The manufacturing method of a semiconductor device according to claim 2 , wherein wet etching using tetramethylammonium hydroxide is performed at the selectively removing a second portion.
4. The manufacturing method of a semiconductor device according to claim 1 , wherein the SiC layer is epitaxially grown in the forming an SiC layer.
5. The manufacturing method of a semiconductor device according to claim 1 , wherein the SiGe layer is epitaxially grown in the forming an SiGe layer.
6. The manufacturing method of a semiconductor device according to claim 1 , wherein Miller index of the side surface of the second recess at the gate insulating film side is {111}.
7. The manufacturing method of a semiconductor device according to claim 1 , further comprising forming a p-type impurity diffusion layer at least partially overlapping with the SiGe layer.
8. The manufacturing method of a semiconductor device according to claim 1 , further comprising removing the first sidewall insulating film between the forming an SiC layer and the forming a second sidewall insulating film,
wherein the second sidewall insulating film is thicker than the first sidewall insulating film in a lateral direction.
9. A manufacturing method of a semiconductor device, comprising:
defining a first active region and a second active region in a silicon substrate, forming an n-well in the first active region, and forming a p-well in the second active region;
forming a gate insulating film on the silicon substrate in the first active region and the second active region;
forming a gate electrode on the gate insulating film in the first active region and the second active region;
forming a first sidewall unsulating film at both lateral sides of the gate electrode in the first active region and the second active region;
forming a first recess along the first sidewall insulating film in the silicon substrate in the first active region and the second active region;
forming an SiC layer of which thickness is thicker than a depth of the first recess in the first recess in the first active region and the second active region;
forming a second sidewall insulating film covering a part of the SiC layer at both lateral sides of the gate electrode in the first active region;
selectively removing the SiC layer so as to form a second recess, a side surface of the second recess at the gate insulating film side being inclined; and
forming an SiGe layer in the second recess in the first active region.
10. The manufacturing method of a semiconductor device according to claim 9 , wherein the forming a second recess comprises:
removing a first portion of the SiC layer, the first portion exposing from the second sidewall insulating film; and
selectively removing a second portion of the SiC layer, the second portion being under the second sidewall insulating film.
11. The manufacturing method of a semiconductor device according to claim 10 , wherein wet etching using tetramethylammonium hydroxide is performed at the selectively removing a second portion.
12. The manufacturing method of a semiconductor device according to claim 9 , wherein the SiC layer is epitaxially grown in the forming an SiC layer.
13. The manufacturing method of a semiconductor device according to claim 9 , wherein the SiGe layer is epitaxially grown in the forming an SiGe layer.
14. The manufacturing method of a semiconductor device according to claim 9 , wherein Miller index of the side surface of the second recess at the gate insulating film side is {111}.
15. The manufacturing method of a semiconductor device according to claim 9 , further comprising:
forming a p-type impurity diffusion layer at least partially overlapping with the SiGe layer in the first active region; and
forming an n-type impurity diffusion layer at least partially overlapping with the SiC layer in the second active region.
16. The manufacturing method of a semiconductor device according to claim 9 , further comprising removing the first sidewall insulating film between the forming an SiC layer and the forming a second sidewall insulating film,
wherein the second sidewall insulating film is thicker than the first sidewall insulating film in a lateral direction.
17. A semiconductor device, comprising:
a silicon substrate defined into a first active region and a second active region, in which an n-well is formed in the first active region, and a p-well is formed in the second active region;
a gate insulating film formed on the silicon substrate in the first active region and the second active region;
a gate electrode formed on the gate insulating film in the first active region and the second active region;
a sidewall insulating film formed at both lateral sides of the gate electrode in the first active region and the second active region;
a recess formed at both sides of the gate electrode and at a surface of the silicon substrate in the first active region and the second active region;
an SiGe layer formed in the recess in the first active region;
a first SiC layer formed under the sidewall insulating film on the SiGe layer in the first active region; and
a second SiC layer formed in the recess in the second active region,
wherein a side surface of the recess at the gate insulating film side in the first active region is inclined.
18. The semiconductor device according to claim 17 , wherein Miller index of the side surface of the recess at the gate insulating film side in the second active region is {111}.
19. The semiconductor device according to claim 17 , further comprising:
a p-type impurity diffusion layer formed in the first active region and at least partially overlapping with the SiGe layer; and
an n-type impurity diffusion layer formed in the second active region and at least partially overlapping with the SiC layer.